PSN0210A_10 datasheet, PDF - EEWORLD Datasheet

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PSN0210A_10: DescriptionPHASE LOCKED LOOP; File Size64KB，2 Pages; ManufacturerZ-Communications, Inc.; Websitehttps://www.zcomm.com/

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PSN0210A_10 Overview

PHASE LOCKED LOOP

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PSN0210A

14118 Stowe Drive, Suite B | Poway, CA 92064

TEL: (858) 621-2700 | FAX: (858) 486-1927

PHASE LOCKED LOOP

Rev A2

PHASE NOISE (1 Hz BW, typical)

FEATURES

• Frequency Range:

200 - 230 MHz

• Step Size:

100 KHz

• PLL - Style Package

APPLICATIONS

• Telecommunications

• Satellite

• Telemetry

PERFORMANCE SPECIFICATIONS

Frequency Range

VALUE

200

230

-105

-10

-65

4±3

100

1000

-40 to +85

PLL

APPLICATION NOTES

Phase Noise @ 10 kHz offset (1 Hz BW, typ.)

Harmonic Suppression (2nd, typ.)

Sideband Spurs (typ.)

Power Output

Load Impedance

Step Size

Charge Pump Output Current

Switching Speed (typ., adjacent channel)

Startup Lock Time (typ.)

Operating Temperature Range

Package Style

UNITS

MHz

dBc/Hz

dBc

dBm

kHz

mSec

°C

POWER SUPPLY REQUIREMENTS

Supply Voltage (Vcc, nom.)

Supply Current (Icc, typ.)

Vdc

All specifications are typical unless otherwise noted and subject to change without notice.

•

AN-107 : How to Solder Z-COMM VCOs / PLLs

•

AN-202 : PLL Functional Description

NOTES:

Reference Oscillator Signal: 5 MHz<

<40 MHz

Frequency Synthesizer: National Semiconductor - LMX2306

Page 1

Prescaler: 8

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