CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Absolute linearity is utilized to determine actual wiper resistance vs expected resistance = (R
H(n)
(actual) - R
H(n)
(expected)) =
±1 Ml Maximum. n = 1 .. 29 only
2. Relative linearity is a measure of the error in step size between taps = R
H(n+1)
- [R
H(n)
+ Ml] = ±0.5 Ml, n = 1 .. 29 only.
3. 1 Ml = Minimum Increment = R
TOT
/31.
4. Typical values are for T
A
= +25°C and nominal supply voltage.
5. Limits established by characterization and are not production tested.
6. When performing multiple write operations, V
CC
must not decrease by more than 150mV from its initial value.
7. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Potentiometer Characteristics
SYMBOL
R
TOT
V
R
Over recommended operating conditions, unless otherwise specified.
TEST CONDITIONS/NOTES
MIN
(Note 7)
37.5
0
R
TOTAL
=
50kΩ (Note 5)
Ref: 1kHz (Note 5)
(Note 5)
(Note 5)
3
R
H(n)(actual)
- R
H(n)(expected)
R
H(n+1 -
[R
H(n)+MI
]
(Notes 5)
See “Circuit #2 SPICE Macro Model”
on page 4
±35
10/10/25
±1
±0.5
-120
1000
0.6
TYP
(Note 4)
50
MAX
(Note 7)
62.5
V
CC
1
UNIT
kΩ
V
mΩ
(Note 6)
dBV
(Note 6)
Ω
mA
%
MI
(Note 3)
MI
(Note 3)
ppm/°C
pF
PARAMETER
End-to-End Resistance
R
H
, R
L
Terminal Voltages
Power Rating
Noise
R
W
I
W
Wiper Resistance
Wiper Current
Resolution
Absolute Linearity (Note 1)
Relative Linearity (Note 2)
R
TOTAL
Temperature Coefficient
C
H
/C
L
/C
W
Potentiometer Capacitances
3
FN8187.1
February 4, 2008
X93255
DC Operating Specifications
SYMBOL
I
CC1
I
CC2
I
SB
I
LI
I
LI
I
LI
V
IH
V
IL
C
IN
(Note 6)
Over recommended operating conditions unless otherwise specified.
TEST CONDITIONS
MIN
(Note 7)
TYP
(Note 4)
200
MAX
(Note 7)
300
1400
4
±1
120
200
250
±1
V
CC
x 0.7
-0.5
V
CC
= 5V, V
IN
= V
SS
, T
A
= +25°C,
f = 1MHz (Note 5)
V
CC
+ 0.5
V
CC
x 0.1
10
UNIT
µA
µA
µA
µA
µA
µA
V
V
pF
PARAMETER
VCC Active Current (Increment) per DCP CS = V
IL
, U/D = V
IL
or V
IH
and
INC = 0.4V @ max. t
CYC
VCC Active Current (Store)
(EEPROM Store) per DCP
Standby Supply Current
CS
CS
INC, U/D Input Leakage Current
CS, INC, U/D Input HIGH Voltage
CS, INC, U/D Input LOW Voltage
CS, INC, U/D Input Capacitance
CS = V
IH
, U/D = V
IL
or V
IH
and
INC = V
IH
@ max. t
WR
CS = V
CC
- 0.3V, U/D and
INC = V
SS
or V
CC
- 0.3V
V
CS
= V
CC
V
CC
= 5V, CS = 0
V
IN
= V
SS
to V
CC
Endurance and Data Retention
PARAMETER
Minimum endurance
Data retention
MIN
200,000
100
UNIT
Data changes per bit
Years
AC Conditions of Test
Input pulse levels
Input rise and fall times
Input reference levels
0V to 5V
10ns
1.5V
Test Circuit #1
TEST POINT
V
H
/R
H
Circuit #2 SPICE Macro Model
R
TOTAL
R
H
C
H
C
W
25pF
10pF
C
L
10pF
R
L
AC Operating Characteristics
Over recommended operating conditions unless otherwise specified. In the table, CS, INC, U/D, R
H
and
R
L
are used to refer to either CS
1
or CS
2
, etc.
SYMBOL
t
Cl
t
lD
t
DI
t
lL
t
lH
t
lC
t
CPH
t
CPH
t
CYC
t
R
, t
F
(Note 5)
t
R
V
CC
(Note 5)
t
WR
CS to INC Setup
INC HIGH to U/D Change
U/D to INC Setup
INC LOW Period
INC HIGH Period
INC Inactive to CS Inactive
CS Deselect Time (No store)
CS Deselect Time (Store)
INC Cycle Time
INC Input Rise and Fall Time
VCC Power-up Rate
Store cycle
1
5
PARAMETER
MIN
(Note 7)
100
100
100
1
1
1
250
10
2
500
50
10
TYP
(Note 4)
MAX
(Note 7)
UNIT
ns
ns
ns
µs
µs
µs
ns
ms
µs
µs
V/ms
ms
4
FN8187.1
February 4, 2008
X93255
AC Timing
CS
t
CYC
t
CI
INC
t
IL
t
IH
t
IC
(STORE)
t
CPH
90%
10%
90%
t
ID
t
DI
t
F
t
R
U/D
Note: CS, INC, U/D, R
H
and R
L
are used to refer
to either CS
1
or CS
2
, etc.
Power-up and Power-down Requirements
There are no restrictions on the power-up or power-down
conditions of V
CC
and the voltages applied to the
potentiometer pins provided that V
CC
is always more
positive than or equal to V
H
and V
L
, i.e., V
CC
≥
V
H,
V
L
. The
V
CC
ramp rate specification is always in effect.
Principles of Operation
There are multiple sections for each potentiometer in the
X93255: an input control, a counter and decode section; the
nonvolatile memory; and a resistor array. Each input control
section operates just like an up/down counter. The output of
this counter is decoded to turn on a single electronic switch
connecting a point on the resistor array to the wiper output.
Under the proper conditions, the contents of the counter can
be stored in nonvolatile memory and retained for future use.
Each resistor array is comprised of 31 individual resistors
connected in series. At either end of the array and between
each resistor is an electronic switch that transfers the
connection at that point to the wiper. The wiper is connected
to the R
L
terminal, forming a variable resistor from R
H
to R
L
.
Each wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
If the wiper is moved several positions, multiple taps are
connected to the wiper for up to 10µs. The 2-terminal
resistance value for the device can temporarily change by a
significant amount if the wiper is moved several positions.
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory for each
potentiometer. When power is restored, the contents of the
memory are recalled and each wiper is set to the value last
stored.
Pin Descriptions
R
H
and R
L
The R
H
and R
L
pins of the X93255 are equivalent to the end
terminals of a variable resistor. The minimum voltage is V
SS
and the maximum is V
CC
. The terminology of R
H
and R
L
references the relative position of the terminal in relation to
wiper movement direction selected by the U/D input per
potentiometer.
Up/Down (U/D)
The U/D input controls the direction of a single
potentiometer’s wiper movement and whether the counter is
incremented or decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
pertaining potentiometer’s counter in the direction indicated
by the logic level on the pertaining potentiometer’s U/D
input.
Chip Select (CS)
A potentiometer is selected when the pertaining CS input is
LOW. Its current counter value is stored in nonvolatile
memory when the pertaining CS is returned HIGH while the
pertaining INC input is also HIGH. After the store operation
is complete, the affected potentiometer will be placed in the
low power standby mode until the potentiometer is selected