EV31C3A3A1-38.880M
Series
RoHS Compliant (Pb-free) 5.0V 6 Pad 5mm x 7mm
Ceramic SMD HCMOS/TTL VCXO (Tri-State Pad 5)
Operating Temperature Range
0°C to +70°C
Absolute Pull Range
±50ppm Minimum
RoHS
Pb
Nominal Frequency
38.880MHz
EV31C3 A 3 A 1 -38.880M
Duty Cycle
50 ±5(%) Typical, 50 ±10(%) Maximum
Linearity
10% Typical, 20% Maximum
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
Aging at 40°C
Operating Temperature Range
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Absolute Pull Range
38.880MHz
±50ppm Maximum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, Shock, and Vibration.)
±2ppm/First year typical, ±10ppm/10 Years Maximum
0°C to +70°C
5.0Vdc ±10%
35mA Maximum
90% of Vdd Minimum (IOH = -4mA)
10% of Vdd Maximum (IOL = +4mA)
5nSec Maximum (Measured at 0.4Vdc to 2.4Vdc with TTL Load; Measured at 20% to 80% of waveform
with HCMOS Load)
50 ±5(%) Typical, 50 ±10(%) Maximum (Measured at 1.4Vdc with TTL Load; Measured at 50% of
waveform with HCMOS Load)
10TTL Load or 30pF HCMOS Load Maximum
CMOS
±50ppm Minimum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, Shock, Vibration, and Aging
over the Control Voltage (Vc).)
0.5Vdc to 4.5Vdc (Test condition for Absolute Pull Range)
0.0Vdc to Vdd
10% Typical, 20% Maximum
Positive Transfer Characteristic
10kHz Minimum (Measured at -3dB, Vc = 2.5Vdc)
50kOhms Minimum
10µA Maximum
-70dBc/Hz at offset of 10Hz, -100dBc/Hz at offset of 100Hz, -130dBc/Hz at offset of 1kHz, -147dBc/Hz at
offset of 10kHz, -152dBc/Hz at offset of 100kHz, and -155dBc/Hz at offset of 1MHz (Typical Values at Fo =
27MHz)
+0.9Vdd Minimum to Enable Output; +0.1Vdd Maximum to Disable Output (High Impedance); No Connect
to Enable Output.
1pSec Maximum (Fj = 12kHz to 20MHz)
10mSec Maximum
-55°C to +125°C
Control Voltage
Control Voltage Range
Linearity
Transfer Function
Modulation Bandwidth
Input Impedance
Input Leakage Current
Phase Noise
Tri-State Input Voltage (Vih and Vil)
RMS Phase Jitter
Start Up Time
Storage Temperature Range
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
Fine Leak Test
Gross Leak Test
Mechanical Shock
Resistance to Soldering Heat
Resistance to Solvents
Solderability
Temperature Cycling
Vibration
MIL-STD-883, Method 1014 Condition A
MIL-STD-883, Method 1014 Condition C
MIL-STD-202, Method 213 Condition C
MIL-STD-202, Method 210
MIL-STD-202, Method 215
MIL-STD-883, Method 2003
MIL-STD-883, Method 1010
MIL-STD-883, Method 2007 Condition A
www.ecliptek.com | Specification Subject to Change Without Notice | Rev K 2/17/2010 | Page 1 of 6
EV31C3A3A1-38.880M
Test Circuit for TTL Output
Switch
Oscilloscope
Power
Supply
Supply
Voltage
(V
DD
)
Tri-State
Power
Supply
Voltage
Meter
0.01µF
(Note 1)
0.1µF
(Note 1)
No
Connect
Ground
C
L
(Note 3)
Note 5
Power
Supply
Probe
(Note 2)
Output
R
L
(Note 4)
Frequency
Counter
Current
Meter
Power
Supply
Voltage
Control
Voltage
Meter
Output Load
Drive Capability
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a
0.01µF high frequency ceramic bypass capacitor close to the package ground
and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance
(>10Mohms), and high bandwidth (>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
Note 4: Resistance value R
L
is shown in Table 1. See applicable specification sheet for
'Load Drive Capability'.
Note 5: All diodes are MMBD7000, MMBD914, or equivalent.
10TTL
5TTL
2TTL
10LSTTL
1TTL
R
L
Value
(Ohms)
390
780
1100
2000
2200
C
L
Value
(pF)
15
15
6
15
3
Table 1: R
L
Resistance Value and C
L
Capacitance
Value Vs. Output Load Drive Capability
www.ecliptek.com | Specification Subject to Change Without Notice | Rev K 2/17/2010 | Page 3 of 6
EV31C3A3A1-38.880M
Test Circuit for CMOS Output
Switch
Power
Supply
Oscilloscope
Frequency
Counter
Current
Meter
Power
Supply
Voltage
Meter
0.01µF
(Note 1)
Supply
Voltage
(V
DD
)
Tri-State
0.1µF
(Note 1)
No
Connect
Voltage
Control
Probe
(Note 2)
Output
Ground
C
L
(Note 3)
Power
Supply
Voltage
Meter
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a
0.01µF high frequency ceramic bypass capacitor close to the package ground
and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance
(>10Mohms), and high bandwidth (>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
www.ecliptek.com | Specification Subject to Change Without Notice | Rev K 2/17/2010 | Page 4 of 6
Analog electronics
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