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KMA7D0NP30Q

Description
N and P-CH Trench MOSFET
CategoryDiscrete semiconductor    The transistor   
File Size84KB,8 Pages
ManufacturerKEC
Websitehttp://www.keccorp.com/
Download Datasheet Parametric View All

KMA7D0NP30Q Overview

N and P-CH Trench MOSFET

KMA7D0NP30Q Parametric

Parameter NameAttribute value
MakerKEC
package instructionSMALL OUTLINE, R-PDSO-G8
Contacts8
Reach Compliance Codeunknow
Other featuresULTRA-LOW RESISTANCE
ConfigurationSEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage30 V
Maximum drain-source on-resistance0.024 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G8
Number of components2
Number of terminals8
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeN-CHANNEL AND P-CHANNEL
Maximum pulsed drain current (IDM)28 A
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationDUAL
transistor applicationsSWITCHING
Transistor component materialsSILICON
SEMICONDUCTOR
TECHNICAL DATA
General Description
Switching regulator and DC-DC converter applications.
It s mainly suitable for power management in notebook,
portable equipment and battery powered systems.
KMA7D0NP30Q
N and P-CH Trench MOSFET
A
FEATURES
N-Channel
: V
DSS
=30V, I
D
=7A.
: R
DS(ON)
=17m (Typ.) @ V
GS
=10V.
: R
DS(ON)
=22m (Typ.) @ V
GS
=4.5V.
8
5
B1 B2
T
L
1
4
P-Channel
: V
DSS
=-30V, I
D
=-5.5A.
: R
DS(ON)
=35m (Typ.) @ V
GS
=-10V.
: R
DS(ON)
=51m (Typ.) @ V
GS
=-4.5V.
Super high dense cell design for extermely low R
DS(ON)
.
Reliable and rugged.
D
P
G
H
DIM
A
B1
B2
D
G
H
L
P
T
MILLIMETERS
_
4.9 + 0.1
_
3.9 + 0.1
_
6.0 + 0.2
_
0.4 + 0.1
0.15+0.1/-0.05
_
1.5 + 0.2
_
0.75 + 0.2
1.27
0.5 MAX
FLP-8
MAXIMUM RATING (Ta=25
CHARACTERISTIC
Drain-Source Voltage
Gate-Source Voltage
DC
Drain Curren
Pulsed
Drain Power Dissipation
Ta=25
Ta=100
Maximum Junction Temperature
Storage Temperature Range
Thermal Resistance, Junction to Case
)
SYMBOL
V
DSS
V
GSS
I
D
*
I
DP
P
D
*
T
j
T
stg
R
thJA
*
N-Ch
30
20
7
28
2
W
0.8
150
-55 150
62.5
/W
P-Ch
-30
20
-5.5
A
-20
UNIT
V
V
* : Surface Mounted on FR4 Board, t 10sec.
D1
D1
S2
PIN CONNECTION (TOP VIEW)
S1
G1
S2
G2
1
8
D1
D1
D2
D2
S1
G1
G2
2
7
3
6
4
5
D2
D2
N-Channel MOSFET
P-Channel MOSFET
2005. 10. 25
Revision No : 3
1/8
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