Junction Temperature .....................................................+150NC
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (q
JA
) ..........48°C/W
Junction-to-Case Thermal Resistance (q
JC
) .................7°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
PVDD
= V
SVDD
= V
SVDD2
= 5V, V
PGND
= V
SGND
= 0V, C
BIAS
= 0.1µF, C1 = C2 = 1µF, R
IN
= 20kω, R
F
= 20kω (MAX97220A/
MAX97220B), typical values tested at T
A
= +25°C, unless otherwise noted.) (Notes 2 and 3)
PARAMETER
GENERAL
Supply Voltage Range
Quiescent Supply Current
Undervoltage Lockout
Shutdown Supply Current
Turn-On Time
AMPLIFIERS
Input Resistance
Output Signal Attenuation in
Shutdown
Gain
Output Offset Voltage
Input Common-Mode Voltage
Range
Maximum Differential Input
Signal
2
A
V
V
OS
R
IN
C/D versions only
V
SHDN
= 0V,
R
L
= 10kW
C/D versions only
Unity gain, T
A
= +25NC
A/B versions
V
CM
Voltage at IN+ and IN-
C/D versions
V
DIFF
(Note 4)
-0.5 x
V
PVDD
-0.75 x
V
PVDD
A/B versions
C/D versions
5.5
7.4
10
76
45
6
6.5
350
+0.5 x
V
PVDD
+0.75 x
V
PVDD
PVDD
12.7
kI
dB
dB
FV
PVDD,
SVDD_
I
PVDD
UVLO
I
PVDD_SD
t
ON
Guaranteed by PSRR test
No load, T
A
= +25NC
No load, V
PVDD
= V
SVDD_
= 3.3V
PVDD falling
SHDN
= 0, T
A
= +25NC
Shutdown to full operation
time
A/C versions
B/D versions
4.8
117
1
5.5
130
2.5
5.5
5
2.35
10
6.3
143
5.5
7
V
mA
V
FA
ms
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
P
Differential Input DirectDrive
Line Drivers/Headphone Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(V
PVDD
= V
SVDD
= V
SVDD2
= 5V, V
PGND
= V
SGND
= 0V, C
BIAS
= 0.1µF, C1 = C2 = 1µF, R
IN
= 20kω, R
F
= 20kω (MAX97220A/
MAX97220B), typical values tested at T
A
= +25°C, unless otherwise noted.) (Notes 2 and 3)
PARAMETER
Power-Supply Rejection Ratio
SYMBOL
PSRR
CONDITIONS
V
PVDD
= V
SVDD_
= 2.5V to 5.5V
f
IN
= 217Hz, 200mV
P-P
ripple
f
IN
= 10kHz, 200mV
P-P
ripple
-V
PVDD
/2
P
V
CM
P
+V
PVDD
/2
-0.75 x V
PVDD
P
V
CM
P
+0.75 x V
PVDD
A/B versions
C/D versions
70
45
3
2.15
3.5
40
110
125
103
90
dB
80
105
94
0.0035
%
mW
V
RMS
MIN
74
TYP
90
78
63
86
dB
60
dB
MAX
UNITS
MAX97220A–MAX97220D
Common-Mode Rejection Ratio
CMRR
1kHz, 600I load, THD+N < 0.1%
Output Voltage Swing
V
OUT
1kHz, R
L
= 600I load,
V
PVDD
= V
SVDD_
= 3.3V, THD+N < 0.1%
1kHz, R
L
= 10kI load, THD+N < 0.1%
Output Power
P
OUT
R
L
= 16I, THD+N = 1%
R
L
= 32I, THD+N = 1%
1kHz, 22Hz to 22kHz BW, V
OUT
= 3V
RMS
,
R
L
= 10kI
10kHz, 22Hz to 22kHz BW,
V
OUT
= 3V
RMS
, R
L
= 10kI
Total Harmonic Distortion Plus
Noise
THD+N
1kHz, 22Hz to 22kHz BW, V
OUT
= 2V
RMS
,
R
L
= 600I
10kHz, 22Hz to 30kHz BW,
V
OUT
= 2V
RMS
, R
L
= 600I
1kHz, 22Hz to 22kHz BW, P
OUT
= 20mW,
R
L
= 32I
V
OUT
= 3V
RMS
, THD+N =
0.1%, A-weighted, R
IN
=
R
F
= 10kI, R
L
= 1kI
V
OUT
= 2V
RMS
, V
PVDD
= 3.3V, THD+N = 0.1%,
A-weighted, R
IN
= R
F
=
10kI, R
L
= 600I
V
OUT
= 3V
RMS
, THD+N =
0.1%, A-weighted,
R
L
= 1kI
V
OUT
= 2V
RMS
, V
PVDD
= 3.3V, THD+N = 0.1%,
A-weighted, R
L
= 600I
112.5
A/B
versions
Signal-to-Noise Ratio
SNR
109
dB
106
C/D
versions
103
3
Differential Input DirectDrive
Line Drivers/Headphone Amplifiers
MAX97220A–MAX97220D
ELECTRICAL CHARACTERISTICS (continued)
(V
PVDD
= V
SVDD
= V
SVDD2
= 5V, V
PGND
= V
SGND
= 0V, C
BIAS
= 0.1µF, C1 = C2 = 1µF, R
IN
= 20kω, R
F
= 20kω (MAX97220A/
MAX97220B), typical values tested at T
A
= +25°C, unless otherwise noted.) (Notes 2 and 3)
PARAMETER
SYMBOL
A/B
versions
C/D
versions
CONDITIONS
A-weighted,
R
IN
= R
F
= 10kI
A-weighted
1kHz, V
OUT
= 3V
RMS
,
R
L
= 10kI
10kHz, V
OUT
= 3V
RMS
,
R
L
= 10kI
1kHz, V
OUT
= 2V
RMS
,
R
L
= 600I, V
PVDD
=
V
SVDD_
= 3.3V
10kHz, V
OUT
= 2V
RMS
,
R
L
= 600I, V
PVDD
=
V
SVDD_
= 3.3V
1kHz, P
OUT
= 20mW,
R
L
= 32I
Crosstalk
X
TALK
10kHz, P
OUT
= 20mW,
R
L
= 32I
1kHz, V
OUT
= 2V
RMS
,
R
L
= 10kI
10kHz, V
OUT
= 2V
RMS
,
R
L
= 10kI
C/D
versions
1kHz, V
OUT
= 2V
RMS
,
R
L
= 600I
10kHz, V
OUT
= 2V
RMS
,
R
L
= 600I
1kHz, P
OUT
= 20mW,
R
L
= 32I
1kHz, P
OUT
= 20mW,
R
L
= 16I
Maximum Capacitive Load
Drive
External Feedback Resistor
Range
Oscillator Frequency
C
L
R
F
f
OSC
A/B versions
4.7
450
MIN
TYP
7
FV
14
-125
-108
MAX
UNITS
Output Noise Voltage
VN
-123
A/B
versions
-104
-102
-82
100
98
100
96
95
92
470
20
500
100
550
pF
kI
kHz
dB
4
Differential Input DirectDrive
Line Drivers/Headphone Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(V
PVDD
= V
SVDD
= V
SVDD2
= 5V, V
PGND
= V
SGND
= 0V, C
BIAS
= 0.1µF, C1 = C2 = 1µF, R
IN
= 20kω, R
F
= 20kω (MAX97220A/
MAX97220B), typical values tested at T
A
= +25°C, unless otherwise noted.) (Notes 2 and 3)
PARAMETER
SYMBOL
CONDITIONS
32 samples per second,
A-weighted, R
L
= 10kI,
unity gain
32 samples per second,
A-weighted, R
L
= 32I,
unity gain
Into shutdown
Out of
shutdown
Into shutdown
Out of
shutdown
1.4
0.4
T
A
= +25NC
T
A
= +25NC
1
1
MIN
TYP
-70
-70
-76
-76
dBV
MAX
UNITS
MAX97220A–MAX97220D
Click-and-Pop Level (Note 5)
KCP
LOGIC INPUT (SHDN)
SHDN
Input Logic-High
SHDN
Input Logic-Low
SHDN
Input Leakage Current
High
SHDN
Input Leakage Current
Low
V
IH
V
IL
I
IH
I
IL
V
V
FA
FA
Note 2:
100% production tested at T
A
= +25NC. Specifications over temperature limits are guaranteed by design.
Note 3:
Dynamic specifications are taken over 2.5V to 5.5V supply range. Inputs AC-coupled to PGND.
Note 4:
The maximum differential input signal does not cause any excess distortion due to violation of the common-mode input
range.
Note 5:
Test performed with a resistive load connected to PGND. Mode transitions are controlled by
SHDN.
KCP level is calcu-
lated as 20 x log (peak voltage during mode transition, no input signal).
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PCB Design
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