EPF10K100BM560-5 datasheet, PDF

EPF10K100BM560-5: DescriptionLoadable PLD, 27ns, CMOS, PBGA560; CategoryProgrammable logic devices Programmable logic; File Size1MB，55 Pages; ManufacturerAltera (Intel)

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EPF10K100BM560-5 Overview

Loadable PLD, 27ns, CMOS, PBGA560

Parameter Name	Attribute value
Maker	Altera (Intel)
package instruction	BGA,
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	4992 LOGIC ELEMENTS CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
maximum clock frequency	53.76 MHz
JESD-30 code	S-PBGA-B560
JESD-609 code	e1
Dedicated input times	4
Number of terminals	560
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	4 DEDICATED INPUTS
Output function	REGISTERED
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Programmable logic type	LOADABLE PLD
propagation delay	27 ns
Certification status	Not Qualified
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal location	BOTTOM

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