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SSM3J36FS

Description
Power Management Switches
CategoryDiscrete semiconductor    The transistor   
File Size180KB,5 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Environmental Compliance
Download Datasheet Parametric View All

SSM3J36FS Overview

Power Management Switches

SSM3J36FS Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
package instructionSMALL OUTLINE, R-PDSO-G3
Contacts3
Reach Compliance Codeunknow
ECCN codeEAR99
ConfigurationSINGLE WITH BUILT-IN DIODE AND RESISTOR
Minimum drain-source breakdown voltage20 V
Maximum drain current (ID)0.33 A
Maximum drain-source on-resistance1.31 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G3
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeP-CHANNEL
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
SSM3J36FS
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type
SSM3J36FS
Power Management Switches
1.5-V drive
Low ON-resistance: R
on
= 3.60
Ω
(max) (@V
GS
= -1.5 V)
: R
on
= 2.70
Ω
(max) (@V
GS
= -1.8 V)
: R
on
= 1.60
Ω
(max) (@V
GS
= -2.8 V)
: R
on
= 1.31
Ω
(max) (@V
GS
= -4.5 V)
Unit: mm
Absolute Maximum Ratings (Ta = 25 °C)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current
Drain power dissipation
Channel temperature
Storage temperature range
DC
Pulse
Symbol
V
DSS
V
GSS
I
D
I
DP
P
D
(Note1)
T
ch
T
stg
Rating
-20
±8
-330
-660
150
150
−55
to 150
Unit
V
V
mA
mW
°C
°C
Note: Using continuously under heavy loads (e.g. the application of
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the
Toshiba Semiconductor Reliability Handbook (“Handling
Precautions”/“Derating Concept and Methods”) and individual
reliability data (i.e. reliability test report and estimated failure rate,
etc).
Note1: Mounted on an FR4 board
2
(25.4 mm
×
25.4 mm
×
1.6mm, Cu Pad: 0.36 mm
×3
)
JEDEC
JEITA
TOSHIBA
2-2H1B
Weight: 2.4 mg (typ.)
Marking
3
Equivalent Circuit
(top view)
3
PX
1
2
1
2
Handling Precaution
When handling individual devices (which are not yet mounted on a circuit board), ensure that the environment is
protected against static electricity. Operators should wear anti-static clothing, and containers and other objects that come
into direct contact with devices should be made of anti-static materials.
Usage Considerations
Let V
th
be the voltage applied between gate and source that causes the drain current (I
D
) to below
−1
mA for the
SSM3J36FS). Then, for normal switching operation, V
GS(on)
must be higher than V
th,
and V
GS(off)
must be lower than
V
th.
This relationship can be expressed as: V
GS(off)
< V
th
< V
GS(on).
Take this into consideration when using the device.
1
2008-06-11

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