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HYMD264G726BL8-K

Description
Registered DDR SDRAM DIMM
Categorystorage    storage   
File Size244KB,16 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
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HYMD264G726BL8-K Overview

Registered DDR SDRAM DIMM

HYMD264G726BL8-K Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSK Hynix
Parts packaging codeDIMM
package instructionDIMM, DIMM184
Contacts184
Reach Compliance Codecompli
ECCN codeEAR99
access modeDUAL BANK PAGE BURST
Maximum access time0.75 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)133 MHz
I/O typeCOMMON
JESD-30 codeR-XDMA-N184
memory density4831838208 bi
Memory IC TypeDDR DRAM MODULE
memory width72
Number of functions1
Number of ports1
Number of terminals184
word count67108864 words
character code64000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize64MX72
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIMM
Encapsulate equivalent codeDIMM184
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2.5 V
Certification statusNot Qualified
refresh cycle8192
self refreshYES
Maximum standby current0.83 A
Maximum slew rate3.485 mA
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
64Mx72 bits
Registered DDR SDRAM DIMM
HYMD264G726B(L)8-M/K/H/L
DESCRIPTION
Hynix HYMD264G726B(L)8-M/K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line
Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMD264G726B(L)8-
M/K/H/L series consists of eighteen 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy sub-
strate. Hynix HYMD264G726B(L)8-M/K/H/L series provide a high performance 8-byte interface in 5.25" width form fac-
tor of industry standard. It is suitable for easy interchange and addition.
Hynix HYMD264G726B(L)8-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous
operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs
are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both ris-
ing and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth.
All input and output voltage levels are compatible with SSTL_2. High speed frequencies, programmable latencies and
burst lengths allow variety of device operation in high performance memory system.
Hynix HYMD264G726B(L)8-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function
is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to iden-
tify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
FEATURES
512MB (64M x 72) Registered DDR DIMM based on
32Mx8 DDR SDRAM
JEDEC Standard 184-pin dual in-line memory mod-
ule (DIMM)
Error Check Correction (ECC) Capability
Registered inputs with one-clock delay
Phase-lock loop (PLL) clock driver to reduce loading
2.5V +/- 0.2V VDD and VDDQ Power supply
All inputs and outputs are compatible with SSTL_2
interface
Fully differential clock operations (CK & /CK) with
100MHz/125MHz/133MHz
Programmable CAS Latency 2 / 2.5 supported
Programmable Burst Length 2 / 4 / 8 with both
sequential and interleave mode
tRAS Lock-out function supported
Internal four bank operations with single pulsed RAS
Auto refresh and self refresh supported
8192 refresh cycles / 64ms
ORDERING INFORMATION
Part No.
HYMD264G726B(L)8-M
HYMD264G726B(L)8-K
HYMD264G726B(L)8-H
HYMD264G726B(L)8-L
V
DD
=2.5V
V
DDQ
=2.5V
Power Supply
Clock Frequency
133MHz (*DDR266:2-2-2)
133MHz (*DDR266A)
133MHz (*DDR266B)
100MHz (*DDR200)
Interface
Form Factor
SSTL_2
184pin Registered DIMM
5.25 x 1.7 x 0.15 inch
* JEDEC Defined Specifications compliant
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.1/Oct. 02
1

HYMD264G726BL8-K Related Products

HYMD264G726BL8-K HYMD264G726B8-H HYMD264G726B8-K HYMD264G726B8-M HYMD264G726BL8-H HYMD264G726BL8-L HYMD264G726BL8-M
Description Registered DDR SDRAM DIMM Registered DDR SDRAM DIMM Registered DDR SDRAM DIMM Registered DDR SDRAM DIMM Registered DDR SDRAM DIMM Registered DDR SDRAM DIMM Registered DDR SDRAM DIMM
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Maker SK Hynix SK Hynix SK Hynix SK Hynix SK Hynix SK Hynix SK Hynix
Parts packaging code DIMM DIMM DIMM DIMM DIMM DIMM DIMM
package instruction DIMM, DIMM184 DIMM, DIMM184 DIMM, DIMM184 DIMM, DIMM184 DIMM, DIMM184 DIMM, DIMM184 DIMM, DIMM184
Contacts 184 184 184 184 184 184 184
Reach Compliance Code compli unknow unknow unknow compli compli compli
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
access mode DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST
Maximum access time 0.75 ns 0.75 ns 0.75 ns 0.75 ns 0.75 ns 0.8 ns 0.75 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 133 MHz 133 MHz 133 MHz 133 MHz 133 MHz 125 MHz 133 MHz
I/O type COMMON COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 code R-XDMA-N184 R-XDMA-N184 R-XDMA-N184 R-XDMA-N184 R-XDMA-N184 R-XDMA-N184 R-XDMA-N184
memory density 4831838208 bi 4831838208 bi 4831838208 bi 4831838208 bi 4831838208 bi 4831838208 bi 4831838208 bi
Memory IC Type DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE
memory width 72 72 72 72 72 72 72
Number of functions 1 1 1 1 1 1 1
Number of ports 1 1 1 1 1 1 1
Number of terminals 184 184 184 184 184 184 184
word count 67108864 words 67108864 words 67108864 words 67108864 words 67108864 words 67108864 words 67108864 words
character code 64000000 64000000 64000000 64000000 64000000 64000000 64000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
organize 64MX72 64MX72 64MX72 64MX72 64MX72 64MX72 64MX72
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code DIMM DIMM DIMM DIMM DIMM DIMM DIMM
Encapsulate equivalent code DIMM184 DIMM184 DIMM184 DIMM184 DIMM184 DIMM184 DIMM184
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
refresh cycle 8192 8192 8192 8192 8192 8192 8192
self refresh YES YES YES YES YES YES YES
Maximum standby current 0.83 A 0.83 A 0.83 A 0.83 A 0.83 A 0.83 A 0.83 A
Maximum slew rate 3.485 mA 3.485 mA 3.485 mA 3.62 mA 3.485 mA 3.35 mA 3.62 mA
Maximum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
Minimum supply voltage (Vsup) 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
surface mount NO NO NO NO NO NO NO
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
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