is a registered trademark of Intel Corporation. NTD™ is a trademark of Alliance Semiconductor Corporation. All trademarks mentioned in this document are
When driven LOW count sequence follows linear convention. This signal is
,
HIGH
internally pulled HIGH.
STATIC
ASYNC
Flow-through mode.When LOW enables single register flow-through mode.
,
Connect to V
DD
if unused or for pipelined operation.
Sleep. Places device in low power mode; data is retained. Connect to GND if
unused.
FT
ZZ
I
I
Absolute maximum ratings
Parameter
Power supply voltage relative to GND
Input voltage relative to GND (input pins)
Input voltage relative to GND (I/O pins)
Power dissipation
DC output current
Storage temperature (plastic)
Temperature under bias
Symbol
V
DD
, V
DDQ
V
IN
V
IN
P
D
I
OUT
T
stg
T
bias
Min
–0.5
–0.5
–0.5
–
–
–65
–65
Max
+4.6
V
DD
+ 0.5
V
DDQ
+ 0.5
1.8
50
+150
+135
Unit
V
V
V
W
mA
°C
°C
Note: Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions may affect reliability.
3/14/01; V.1.0
Alliance Semiconductor
P. 3 of 11
AS7C33256PFS16A
AS7C33256PFS18A
®
Synchronous truth table
CE0
H
L
L
L
L
L
L
L
L
X
X
X
X
H
H
H
H
L
X
H
X
H
CE1
X
L
L
X
X
H
H
H
H
X
X
X
X
X
X
X
X
H
X
X
X
X
CE2
X
X
X
H
H
L
L
L
L
X
X
X
X
X
X
X
X
L
X
X
X
X
ADSP
X
L
H
L
H
L
L
H
H
H
H
H
H
X
X
X
X
H
H
X
H
X
ADSC
L
X
L
X
L
X
X
L
L
H
H
H
H
H
H
H
H
L
H
H
H
H
ADV
X
X
X
X
X
X
X
X
X
L
L
H
H
L
L
H
H
X
L
L
H
H
WEn1
X
X
X
X
X
X
X
F
F
F
F
F
F
F
F
F
F
T
T
T
T
T
OE
X
X
X
X
X
L
H
L
H
L
H
L
H
L
H
L
H
X
X
X
X
X
Address accessed
NA
NA
NA
NA
NA
External
External
External
External
Next
Next
Current
Current
Next
Next
Current
Current
External
Next
Next
Current
Current
CLK
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
Operation
Deselect
Deselect
Deselect
Deselect
Deselect
Begin read
Begin read
Begin read
Begin read
Cont. read
Cont. read
Suspend read
Suspend read
Cont. read
Cont. read
Suspend read
Suspend read
Begin write
Cont. write
Cont. write
Suspend write
Suspend write
DQ
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
2
Hi−Z
Hi−Z
2
Hi−Z
Q
Hi−Z
Q
Hi−Z
Q
Hi−Z
Q
Hi−Z
D
3
D
D
D
D
Key: X = Don’t Care, L = Low, H = High.
1
See “Write enable truth table” on page 2 for more information.
2
Q in flow through mode
3For write operation following a READ,
OE must be HIGH before
the input data set up time and held HIGH throughout the input hold
time.
Recommended operating conditions
Parameter
Supply voltage
3.3V I/O supply
voltage
2.5V I/O supply
voltage
Address and
control pins
I/O pins
Ambient operating temperature
Symbol
V
DD
V
SS
V
DDQ
V
SSQ
V
DDQ
V
SSQ
V
IH
V
IL
V
IH
V
IL
T
A
Min
3.135
0.0
3.135
0.0
2.35
0.0
2.0
–0.5
*
2.0
–0.5
*
0
Nominal
3.3
0.0
3.3
0.0
2.5
0.0
–
–
–
–
–
Max
3.6
0.0
3.6
0.0
2.9
0.0
V
DD
+ 0.3
0.8
V
DDQ
+ 0.3
0.8
70
Unit
V
V
V
V
V
°C
Input voltages
†
* V
IL
min = –2.0V for pulse width less than 0.2 × t
RC
.
† Input voltage ranges apply to 3.3V I/O operation. For 2.5V I/O operation, contact factory for input specifications.
3/14/01; V.1.0
Alliance Semiconductor
P. 4 of 11
®
AS7C33256PFS16A
AS7C33256PFS18A
TQFP thermal resistance
Description
Thermal resistance
(junction to ambient)
*
Thermal resistance
(junction to top of case)
*
* This parameter is sampled.
Conditions
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, per EIA/JESD51
Symbol
θ
JA
θ
JC
Typical
46
2.8
Units
°C/W
°C/W
DC electrical characteristics
–166
Parameter
Input leakage
current
*
Output leakage
current
Operating power
supply current
Symbol
|I
LI
|
|I
LO
|
I
CC
I
SB
Standby power
supply current
I
SB1
I
SB2
Output voltage
V
OL
V
OH
Test conditions
V
DD
= Max, V
IN
= GND to V
DD
OE
≥
V
IH
, V
DD
= Max,
V
OUT
= GND to V
DD
CE0 = V
IL
, CE1 = V
IH
, CE2 = V
IL
,
f = f
Max
, I
OUT
= 0 mA
Deselected, f = f
Max
, ZZ
≤
V
IL
Deselected, f = 0, ZZ
≤
0.2V
all V
IN
≤
0.2V or
≥
V
DD
– 0.2V
Deselected, f = f
Max
, ZZ
≥
V
DD
– 0.2V
All V
IN
≤
V
IL
or
≥
V
IH
I
OL
= 8 mA, V
DDQ
= 3.465V
I
OH
= –4 mA, V
DDQ
= 3.135V
–150
–133
–100
Min Max Min Max Min Max Min Max Unit
–
–
–
–
–
–
–
2.4
2
2
475
130
30
30
0.4
–
–
–
–
–
–
–
–
2.4
2
2
450
110
30
30
0.4
–
–
–
–
–
–
–
–
2.4
2
2
425
100
30
30
0.4
–
–
–
–
–
–
–
–
2.4
2
2
325
90
30
30
0.4
–
V
mA
µA
µA
mA
* LBO pin has an internal pull-up and input leakage = ±10
µa.
Note: ICC give with no output loading. ICC increases with faster cycle times and greater output loading.
DC electrical characteristics for 2.5V I/O operation
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