P-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 MARCH 94
FEATURES
* 50 Volt V
DS
* R
DS(on)
=10Ω
* Low threshold
ZVP4105A
D
G
S
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at T
amb
=25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at T
amb
=25°C
Operating and Storage Temperature Range
SYMBOL
V
DS
I
D
I
DM
V
GS
P
tot
T
j
:T
stg
-50
E-Line
TO92 Compatible
VALUE
-175
-520
±
20
UNIT
V
mA
mA
V
mW
°C
625
-55 to +150
ELECTRICAL CHARACTERISTICS (at T
amb
= 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN.
BV
DSS
V
GS(th)
I
GSS
I
DSS
-50
-0.8
-2.0
10
-15
-60
-100
10
50
40
15
6
10
10
18
25
MAX. UNIT CONDITIONS.
V
V
nA
µ
A
µ
A
Ω
Drain-Source Breakdown
Voltage
Gate-Source Threshold
Voltage
Gate-Body Leakage
Zero Gate Voltage Drain
Current
I
D
=-0.25mA, V
GS
=0V
ID=-1mA, V
DS
= V
GS
V
GS
=
±
20V, V
DS
=0V
V
DS
=-50V, V
GS
=0V
V
DS
=-50V, V
GS
=0V, T=125°C
(2)
V
DS
=-25V, V
GS
=0V
V
GS
=-5V,I
D
=-100mA
V
DS
=-25V,I
D
=-100mA
nA
Static Drain-Source On-State R
DS(on)
Resistance (1)
Forward Transconductance
(1)(2)
Input Capacitance (2)(4)
Common Source Output
Capacitance (2)(4)
Reverse Transfer
Capacitance (2)(4)
Rise Time (2)(3)(4)
Fall Time (2)(3)(4)
g
fs
C
iss
C
oss
C
rss
mS
pF
pF
pF
ns
ns
ns
ns
V
DS
=-25V, V
GS
=0V, f=1MHz
Turn-On Delay Time (2)(3)(4) t
d(on)
t
r
t
f
Turn-Off Delay Time (2)(3)(4) t
d(off)
V
DD
≈
-30V, I
D
=-270mA
(1) Measured under pulsed conditions. Width=300
µ
s. Duty cycle
≤
2%
(2) Sample test.
(3) Switching times measured with 50
Ω
source impedance and <5ns rise time on a pulse generator
3-435
(
4
)
Embedded System
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