STM32F101ZCT6TR datasheet, PDF

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STM32F101ZCT6TR: Description32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP144; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，121 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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STM32F101ZCT6TR Overview

32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP144

STM32F101ZCT6TR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	QFP
package instruction	LFQFP, QFP144,.87SQ,20
Contacts	144
Reach Compliance Code	compli
Has ADC	YES
Address bus width
bit size	32
CPU series	CORTEX-M3
maximum clock frequency	16 MHz
DAC channel	YES
DMA channel	YES
External data bus width
JESD-30 code	S-PQFP-G144
length	20 mm
Number of I/O lines	112
Number of terminals	144
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP144,.87SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5/3.3 V
Certification status	Not Qualified
RAM (bytes)	32768
rom(word)	262144
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	36 MHz
Maximum slew rate	39 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	2 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	20 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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STM32F101xC STM32F101xD

STM32F101xE

High-density access line, ARM

-based 32-bit MCU with 256 KB

to 512 MB Flash, 9 timers, 1 ADC and 10 communication interfaces

Datasheet

−

production data

Features

•

Core: ARM

32-bit Cortex

-M3 CPU

– 36 MHz maximum frequency,

1.25 DMIPS/MHz (Dhrystone 2.1)

performance

– Single-cycle multiplication and hardware

division

•

Memories

– 256 to 512 Kbytes of Flash memory

– up to 48 Kbytes of SRAM

– Flexible static memory controller with 4

Chip Select. Supports Compact Flash,

SRAM, PSRAM, NOR and NAND

memories

– LCD parallel interface, 8080/6800 modes

•

Clock, reset and supply management

– 2.0 to 3.6 V application supply and I/Os

– POR, PDR, and programmable voltage

detector (PVD)

– 4-to-16 MHz crystal oscillator

– Internal 8 MHz factory-trimmed RC

– Internal 40 kHz RC with calibration

capability

– 32 kHz oscillator for RTC with calibration

•

Low power

– Sleep, Stop and Standby modes

– V

BAT

supply for RTC and backup registers

•

1 x 12-bit, 1 µs A/D converters (up to 16

channels)

– Conversion range: 0 to 3.6 V

– Temperature sensor

•

2 × 12-bit D/A converters

•

DMA

– 12-channel DMA controller

– Peripherals supported: timers, ADC, DAC,

SPIs, I

Cs and USARTs

•

Up to 112 fast I/O ports

LQFP144

20 × 20 mm

LQFP100

14 × 14 mm

QFP64

10 × 10 mm

– 51/80/112 I/Os, all mappable on 16

external interrupt vectors and almost all

5 V-tolerant

•

Debug mode

– Serial wire debug (SWD) & JTAG

interfaces

– Cortex-M3 Embedded Trace Macrocell™

•

Up to 9 timers

– Up to four 16-bit timers, each with up to 4

IC/OC/PWM or pulse counters

– 2 × watchdog timers (Independent and

Window)

– SysTick timer: a 24-bit downcounter

– 2 × 16-bit basic timers to drive the DAC

•

Up to 10 communication interfaces

– Up to 2 x I

C interfaces

(SMSTM32F101xC, STM32F101xD,

STM32F101xE7816 interface, LIN, IrDA

capability, modem control)

– Up to 3 SPIs (18 Mbit/s)

•

CRC calculation unit, 96-bit unique ID

•

ECOPACK

packages

Table 1. Device summary

Reference

STM32F101xC

STM32F101xD

STM32F101xE

Part number

STM32F101RC STM32F101VC

STM32F101ZC

STM32F101RD STM32F101VD

STM32F101ZD

STM32F101RE STM32F101ZE

STM32F101VE

May 2015

This is information on a product in full production.

DocID14610 Rev 9

1/121

www.st.com

Contents

STM32F101xC, STM32F101xD, STM32F101xE

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.1

2.2

2.3

Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.3.1

2.3.2

2.3.3

2.3.4

2.3.5

2.3.6

2.3.7

2.3.8

2.3.9

2.3.10

2.3.11

2.3.12

2.3.13

2.3.14

2.3.15

2.3.16

2.3.17

2.3.18

2.3.19

2.3.20

2.3.21

2.3.22

2.3.23

2.3.24

2.3.25

2.3.26

ARM

Cortex

-M3 core with embedded Flash and SRAM . . . . . . . . . . 14

Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 15

Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

FSMC (flexible static memory controller) . . . . . . . . . . . . . . . . . . . . . . . . 15

LCD parallel interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 16

External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 16

Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

RTC (real-time clock) and backup registers . . . . . . . . . . . . . . . . . . . . . . 18

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Universal synchronous/asynchronous receiver transmitters (USARTs) . 20

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . 20

ADC (analog to digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 21

Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Pinouts and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

2/121

DocID14610 Rev 9

STM32F101xC, STM32F101xD, STM32F101xE

Contents

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

5.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

5.1.7

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.2

5.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

5.3.6

5.3.7

5.3.8

5.3.9

5.3.10

5.3.11

5.3.12

5.3.13

5.3.14

5.3.15

5.3.16

5.3.17

5.3.18

5.3.19

5.3.20

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 40

Embedded reset and power control block characteristics . . . . . . . . . . . 41

Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 80

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

DAC electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

6.1

6.2

LQFP144 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

LQFP100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

DocID14610 Rev 9

3/121

STM32F101xC, STM32F101xD, STM32F101xE

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Table 44.

Table 45.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

STM32F101xC, STM32F101xD and STM32F101xE features and peripheral counts . . . . 11

STM32F101xx family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

STM32F101xC/STM32F101xD/STM32F101xE pin definitions. . . . . . . . . . . . . . . . . . . . . . 25

FSMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 41

Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Maximum current consumption in Run mode, code with data processing

running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Maximum current consumption in Run mode, code with data processing

running from RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Maximum current consumption in Sleep mode, code running from Flash or RAM. . . . . . . 45

Typical and maximum current consumptions in Stop and Standby modes . . . . . . . . . . . . 45

Typical current consumption in Run mode, code with data processing

running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Typical current consumption in Sleep mode, code running from Flash or RAM . . . . . . . . . 49

Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Low-speed user external clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

HSE 4-16 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

LSE oscillator characteristics (f

LSE

= 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings . . . . . . . . . . . . . . . . . . 60

Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings . . . . . . . . . . . . . . . . . . 61

Asynchronous multiplexed NOR/PSRAM read timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Asynchronous multiplexed NOR/PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Synchronous multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Synchronous multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Synchronous non-multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . 69

Synchronous non-multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Switching characteristics for PC Card/CF read and write cycles . . . . . . . . . . . . . . . . . . . . 75

Switching characteristics for NAND Flash read and write cycles . . . . . . . . . . . . . . . . . . . . 78

EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

DocID14610 Rev 9

5/121

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