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X1G004481022812

Description
CMOS Output Clock Oscillator,
CategoryPassive components    oscillator   
File Size186KB,5 Pages
ManufacturerSeiko Epson Corporation
Environmental Compliance
Download Datasheet Parametric Compare View All

X1G004481022812 Overview

CMOS Output Clock Oscillator,

X1G004481022812 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerSeiko Epson Corporation
Reach Compliance Codeunknown
Other featuresSTANDBY; ENABLE/DISABLE FUNCTION
maximum descent time3.5 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
Installation featuresSURFACE MOUNT
Number of terminals4
Nominal operating frequency3.686 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS
Output load15 pF
physical size7.0mm x 5.0mm x 1.3mm
longest rise time3.5 ns
Maximum slew rate1.8 mA
Maximum supply voltage3.63 V
Minimum supply voltage1.6 V
surface mountYES
maximum symmetry55/45 %
Clock OSC
SG7050CAN
SG7050CAN 3.686000 MHz TJGA
Product name
Product Number / Ordering code
X1G0044810228xx
Please refer to the 8.Packing information about xx (last 2 digits)
Output waveform CMOS
Pb free / Complies with EU RoHS directive
Reference weight Typ. 147 mg
1.Absolute maximum ratings
Parameter
Symbol
Maximum supply voltage
Storage temperature
Input voltage
Min.
-0.3
-40
-0.3
Typ.
-
-
-
Max.
+4
+125
Vcc+0.3
Unit
V
ºC
V
Conditions / Remarks
-
Storage as single product
ST terminal
Vcc-GND
T_stg
Vin
2.Specifications(characteristics)
Parameter
Symbol
Output frequency
Supply voltage
Operating temperature
Frequency tolerance
Current consumption
Stand-by current
Disable current
Symmetry
Output voltage
Output load condition
Input voltage
Min.
1.6
-40
-50
-
-
-
45
Vcc-0.4
-
-
0.8Vcc
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-3
-
Typ.
3.686000
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
2.4
2.3
20
2.5
-
-
-
-
-
-
-
-
-
-
Max.
3.63
+85
50
1.8
2.7
-
55
-
0.4
15
-
0.2Vcc
3.5
3.5
3
-
-
-
-
-
-
-
-
-
-
-
-
-
3
-
Unit
MHz
V
ºC
x10
-6
mA
µA
mA
%
Conditions / Remarks
-
-
T_use
No load condition Vcc = 3.3V
Vcc = 3.3V , ST = GND
-
50% Vcc Level L_CMOS=<15pF
-
-
f0
Vcc
T_use
f_tol
Icc
I_std
I_dis
SYM
V
OH
V
OL
L_CMOS
V
IH
V
IL
t
r
tf
t_str
t
DJ
t
RJ
t
RMS
t
p-p
t
acc
pF
CMOS Load
ST terminal
ST terminal
Vcc1.8V±10% : 0.2Vcc to 0.8Vcc Level,
L_CMOS=15pF
Vcc1.8V±10% : 0.2Vcc to 0.8Vcc Level,
L_CMOS=15pF
t = 0 at 0.9Vcc
Deterministic Jitter Vcc=3.3V
Random Jitter Vcc=3.3V
δ(RMS of total distribution) Vcc=3.3V
Peak to Peak Vcc=3.3V
Accumulated Jitter(δ) n=2 to 50000
cycles
-
Rise time
Fall time
Start-up time
Jitter
ns
ns
ms
ps
ps
ps
ps
ps
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
x10
-6
Phase jitter
Phase noise
t
PJ
L(f)
-
-
-
-
-
-
-
@+25ºC first year
-
Frequency aging
f_age
1 Page

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