I haven't updated you all for a long time since I asked [url=https://bbs.eeworld.com.cn/thread-84156-1-1.html] us to DIY an FPGA development board. Sign up~~~[/url]. The attachment is the circuit diag...
[i=s]This post was last edited by wangfuchong on 2014-1-29 14:05[/i] Breaking News! Shenzhen X News: On the night of January 28, Shenzhen XX Police Station received a call from a woman, claiming that ...
What exactly is the so-called vibrator on the antenna? Can you explain it in a vivid way? Or post a picture to show the real thing (I don't know whether the vibrator is a real thing or a more vivid na...
Is there any such simulation software? I just learned AVR microcontrollers and I used a learning board. I feel that the functions of the learning board are very limited. I found that the circuit simul...
The original program was for STM32F103ZE, I changed it to STM32F103C8T6, and it compiled fine, but there was no output, why? I want to generate a random 0,1 signal, is there any way to do it?...
When using Saber simulation, directly driving the H-bridge with PWM signal can output waveform, as shown in the figure. Whenadding IR2110 isolation driver when PWM signal is generated and H-bridge is ...
The most significant event in the technology circle during this period is undoubtedly the news that ZTE was banned by the United States. Once the news came out, it shocked the entire Chinese techno...[Details]
On April 17, the U.S. Department of Commerce suddenly announced that it would completely ban U.S. companies from
selling parts, goods, software and technology
to
ZTE
within 7 years. This als...[Details]
"Originally, there are many people who can design very good
chips
, but the market does not give domestic
chips
the opportunity to iterate, and domestic companies cannot give engine...[Details]
All relevant units:
In accordance with the relevant requirements of the provincial and municipal electric vehicle charging infrastructure construction work, in order to further standardize the...[Details]
0. Preparation First use st-link to connect the stm32 core board and PC for burning St-link Stm32 3.3V 3.3V GND GND SWDIO PART SWCLK DCLK Then connect with USB serial port board to v...[Details]
I believe that many netizens who have watched "Interstellar" will remember this classic line, "Do not go gentle into this good night, nor let passion be drowned by the gloom of twilight". Different...[Details]
The pins of stm32 have two uses: GPIO (general purpose io) and AFIO (alternate function io) For some pins (depending on the chip), neither of these two uses exists. For example, in 64-pin products, O...[Details]
I have encountered many problems when tinkering with LD driver recently. I will record them one by one below. Otherwise, who will remember who in five hundred years? 1. Configuration issues of multi-...[Details]
The key is the configuration of registers. The T1 timer (16 bits) of CC2530 needs to configure three registers: T1CTL, T1STAT, IRCON Here is just a brief introduction. For more details, please refer ...[Details]
T1 or T2 are two timers/counters of MCS-51 microcontroller. The first method can use two timers/counters to generate rectangular waves. In order to save interface resources, the second method is used...[Details]
MCS-51 single-chip microcomputer timer/counter experiment programming program Programming requirements: 1. Connect a light-emitting diode LED to the P1.0 pin, light up for two seconds, turn off for o...[Details]
Please help me analyze the clock cycles occupied by the following delay program. Seek to explain: DELAY: MOV R6, #13 DELAY1: MOV R5, #250 DELAY2: NOP DJNZ R5, DELAY2 DJNZ R6, DEL...[Details]
I have been deeply affected by serial ports since 51. The MAX232 I bought from Huaqiang was originally broken. I thought there was something wrong with my circuit or schematic. Since there was no goo...[Details]
The isp made a brief summary. Through online programming (the chip is programmed by continuously resetting the chip while the high voltage is converted), the MCU's flash, eeprom, fuse bits, encryptio...[Details]
FPGA/CPLD
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