QL6500-6PT280I datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Programmable logic devices> Programmable logic> QL6500-6PT280I

QL6500-6PT280I: DescriptionField Programmable Gate Array, 3072 CLBs, 488064 Gates, 3032-Cell, CMOS, PBGA280, 17 X 17 MM, 1.50 MM HEIGHT, 0.80 MM PITCH, MO-205, LFBGA-280; CategoryProgrammable logic devices Programmable logic; File Size538KB，40 Pages; ManufacturerQuickLogic Corporation; Websitehttps://www.quicklogic.com

Download Datasheet Parametric View All

QL6500-6PT280I Overview

Field Programmable Gate Array, 3072 CLBs, 488064 Gates, 3032-Cell, CMOS, PBGA280, 17 X 17 MM, 1.50 MM HEIGHT, 0.80 MM PITCH, MO-205, LFBGA-280

QL6500-6PT280I Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	QuickLogic Corporation
Parts packaging code	BGA
package instruction	LFBGA, BGA280,19X19,32
Contacts	280
Reach Compliance Code	compliant
Combined latency of CLB-Max	1.2726 ns
JESD-30 code	S-PBGA-B280
length	17 mm
Humidity sensitivity level	3
Configurable number of logic blocks	3072
Equivalent number of gates	488064
Number of entries	444
Number of logical units	3032
Output times	444
Number of terminals	280
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	3072 CLBS, 488064 GATES
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Encapsulate equivalent code	BGA280,19X19,32
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5,2.5/3.3 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	1.5 mm
Maximum supply voltage	2.7 V
Minimum supply voltage	2.3 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	17 mm

Preview

Download Datasheet

View All

QL6500 Eclipse Data Sheet

• • • • • •

Combining Performance, Density and Embedded RAM

Device Highlights

Flexible Programmable Logic

•

.25

m, Five layer metal CMOS Process

•

2.5 V V

, 2.5 V/3.3 V Drive Capable I/O

•

3,032 Logic Cells

•

488,064 Max System Gates

•

Up to 444 I/O Pins

Advanced Clock Network

•

Nine Global Clock Networks:

•

One Dedicated

•

Eight Programmable

•

20 Quad-Net Networks: Five per Quadrant

•

16 I/O Controls: Two per I/O Bank

Embedded Dual Port SRAM

•

Thirty six 2,304-bit Dual Port High

Memory - Dual Port RAM

High Speed Logic Cells

488K Gates

Performance SRAM Blocks

•

82,900 RAM Bits

•

RAM/ROM/FIFO Wizard for Automatic

Configuration

•

Configurable and Cascadable

Memory - Dual Port RAM

Programmable I/O

•

High performance Enhanced I/O (EIO):

Figure 1: Eclipse Block Diagram

Less than 3 ns Tco

•

Programmable Slew Rate Control

•

Programmable I/O Standards:

•

LVTTL, LVCMOS, PCI, GTL+, SSTL2,

and SSTL3

•

Eight Independent I/O Banks

•

Three Register Configurations: Input,

Output, and Output Enable

www.quicklogic.com

•

Recommended Resources

FM radio high frequency amplification and mixing circuit

The single-phase electric energy meter is connected to the circuit through a current transformer

Photosensitive or thermal switch circuit

Digitally controlled variable gain amplifier

Printing timing exposure device circuit

Switched harmonic crystal oscillator

【GD32E503 Review】Part 7: What is screen tearing? Let’s take a look!: 1. Introduction Screen tearing is a very painful thing. In many cases, the screen will have a tearing effect. Of course, there are ways to solve it, but it still depends on whether the screen supports...; PowerWorld Domestic Chip Exchange

FPGA pins (attached to the sticker): Let's get started! ! ! ! ! [align=left][b]40/56. DEV_OE[/b][/align][align=left]I/O pin or global I/O enable pin. In the Quartus II software, you can enable the DEV_OE option (EnableDevice-wideoutput E...; zx_lx FPGA/CPLD

【ESP32-Korvo Review】 04 Development Environment Construction: The previous review article described a smart atmosphere light example based on the Blinker component written in the Arduino environment . Unfortunately, it can only be used for basic program developm...; 天意无罪 Domestic Chip Exchange

Freescale 2009 seminar之五New Product Update Update i.MX for Consumer and Ge: New Product Update: i.MXARM9 for Consumer and General Embedded Marketi.MXApplications Processor Overview Target markets, product portfolio ARM9 portfolio comparison Platform support i.MX233 Introducti...; madokaaukawa NXP MCU

2010---Have we started preparing?: 2009 has gone quietly. We in the EE world may have had great harvests or regrets. 2009 has passed. The past cannot be changed, but the future can be pursued. 2010---What are we going to do? Are you re...; zch_genius Talking

【10/30@Shanghai- System Integrator Meeting, Sign Up Now! 】IoT Strategic Cooperation Summit Forum-Building...: [color=rgb(88, 88, 88)][font=Verdana, "][b][img=714,403]https://www.wpgholdings.com/uploads/bu/bu_2/Event/20181030_Intel_IoT_SH_Seminar/1030_Intel_IoT_SH_seminar_KV-1.jpg[/img][/b][align=left]>> The I...; eric_wang Mobile and portable

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components