Arria V GX, GT, SX, and ST Device
Datasheet
December 2013
AV-51002-3.6
AV-51002-3.6
Datasheet
This datasheet describes the electrical characteristics, switching characteristics,
configuration specifications, and I/O timing for Arria
®
V devices.
Arria V devices are offered in commercial and industrial grades. Commercial devices
are offered in –C4 (fastest), –C5, and –C6 speed grades. Industrial grade devices are
offered in the –I3 and –I5 speed grades.
f
For more information about the densities and packages of devices in the Arria V
family, refer to the
Arria V Device Overview.
Electrical Characteristics
The following sections describe the operating conditions and power consumption of
Arria V devices.
Operating Conditions
Arria V devices are rated according to a set of defined parameters. To maintain the
highest possible performance and reliability of the Arria V devices, you must consider
the operating requirements described in this section.
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Page 2
Electrical Characteristics
Absolute Maximum Ratings
This section defines the maximum operating conditions for Arria V devices. The
values are based on experiments conducted with the devices and theoretical modeling
of breakdown and damage mechanisms.
The functional operation of the device is not implied for these conditions.
c
Conditions outside the range listed in
Table 1
may cause permanent damage to the
device. Additionally, device operation at the absolute maximum ratings for extended
periods of time may have adverse effects on the device.
Table 1. Absolute Maximum Ratings for Arria V Devices
Symbol
V
CC
V
CCP
V
CCPGM
V
CC_AUX
V
CCBAT
V
CCPD
V
CCIO
V
CCD_FPLL
V
CCA_FPLL
V
CCA_GXB
V
CCH_GXB
V
CCR_GXB
V
CCT_GXB
V
CCL_GXB
V
I
V
CC_HPS
V
CCPD_HPS
V
CCIO_HPS
V
CCPLL_HPS
I
OUT
T
J
T
STG
Core voltage power supply
Periphery circuitry, PCIe
®
hard IP block, and transceiver physical
coding sublayer (PCS) power supply
Configuration pins power supply
Auxiliary supply
Battery back-up power supply for design security volatile key register
I/O pre-driver power supply
I/O power supply
Phase-locked loop (PLL) digital power supply
PLL analog power supply
Transceiver high voltage power
Transmitter output buffer power
Receiver power
Transmitter power
Transceiver clock network power
DC input voltage
HPS core voltage and periphery circuitry power supply
HPS I/O pre-driver power supply
HPS I/O power supply
HPS PLL analog power supply
DC output current per pin
Operating junction temperature
Storage temperature (No bias)
Description
Minimum
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–0.50
–25
–55
–65
Maximum
1.43
1.43
3.90
3.25
3.90
3.90
3.90
1.80
3.25
3.25
1.80
1.50
1.50
1.50
3.80
1.43
3.90
3.90
3.25
3.25
40
125
150
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
°C
°C
V
CCRSTCLK_HPS
HPS reset and clock input pins power supply
Arria V GX, GT, SX, and ST Device Datasheet
December 2013 Altera Corporation
Electrical Characteristics
Page 3
Maximum Allowed Overshoot and Undershoot Voltage
During transitions, input signals may overshoot to the voltage listed in
Table 2
and
undershoot to –2.0 V for input currents less than 100 mA and periods shorter than
20 ns.
The maximum allowed overshoot duration is specified as a percentage of high time
over the lifetime of the device. A DC signal is equivalent to 100% duty cycle.
For example, a signal that overshoots to 4.00 V can only be at 4.00 V for ~15% over the
lifetime of the device; for a device lifetime of 10 years, this amounts to 1.5 years.
Table 2
lists the maximum allowed input overshoot voltage and the duration of the
overshoot voltage as a percentage of device lifetime.
Table 2. Maximum Allowed Overshoot During Transitions for Arria V Devices
Symbol
Description
Condition (V)
3.8
3.85
3.9
3.95
4
4.05
4.1
4.15
Vi (AC)
AC input
voltage
4.2
4.25
4.3
4.35
4.4
4.45
4.5
4.55
4.6
Overshoot Duration as % of High Time
100
68
45
28
15
13
11
9
8
7
5.4
3.2
1.9
1.1
0.6
0.4
0.2
Unit
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
December 2013
Altera Corporation
Arria V GX, GT, SX, and ST Device Datasheet
Page 4
Electrical Characteristics
Recommended Operating Conditions
This section lists the functional operation limits for the AC and DC parameters for
Arria V devices.
Table 3
lists the steady-state voltage values expected from Arria V devices. Power
supply ramps must all be strictly monotonic, without plateaus.
Table 3. Recommended Operating Conditions for Arria V Devices (Part 1 of 2)
Symbol
V
CC
V
CCP
Description
Core voltage power supply
Periphery circuitry, PCIe hard IP block, and
transceiver PCS power supply
Configuration pins (3.3 V) power supply
V
CCPGM
Configuration pins (3.0 V) power supply
Configuration pins (2.5 V) power supply
Configuration pins (1.8 V) power supply
V
CC_AUX
V
CCBAT
(1)
Condition
–C4, –I5, –C5, –C6
–I3
–C4, –I5, –C5, –C6
–I3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Commercial
Industrial
Minimum
1.07
1.12
1.07
1.12
3.135
2.85
2.375
1.71
2.375
1.2
3.135
2.85
2.375
3.135
2.85
2.375
1.71
1.425
1.283
1.19
1.14
1.425
2.375
–0.5
0
0
–40
Typical
1.1
1.15
1.1
1.15
3.3
3.0
2.5
1.8
2.5
—
3.3
3.0
2.5
3.3
3.0
2.5
1.8
1.5
1.35
1.25
1.2
1.5
2.5
—
—
—
—
Maximum
1.13
1.18
1.13
1.18
3.465
3.15
2.625
1.89
2.625
3.0
3.465
3.15
2.625
3.465
3.15
2.625
1.89
1.575
1.418
1.31
1.26
1.575
2.625
3.6
V
CCIO
85
100
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
Auxiliary supply
Battery back-up power supply
(For design security volatile key register)
I/O pre-driver (3.3 V) power supply
I/O pre-driver (3.0 V) power supply
I/O pre-driver (2.5 V) power supply
I/O buffers (3.3 V) power supply
I/O buffers (3.0 V) power supply
I/O buffers (2.5 V) power supply
I/O buffers (1.8 V) power supply
I/O buffers (1.5 V) power supply
I/O buffers (1.35 V) power supply
I/O buffers (1.25 V) power supply
I/O buffers (1.2 V) power supply
V
CCPD
(2)
V
CCIO
V
CCD_FPLL
V
CCA_FPLL
V
I
V
O
T
J
PLL digital voltage regulator power supply
PLL analog voltage regulator power supply
DC input voltage
Output voltage
Operating junction temperature
Arria V GX, GT, SX, and ST Device Datasheet
December 2013 Altera Corporation
Electrical Characteristics
Page 5
Table 3. Recommended Operating Conditions for Arria V Devices (Part 2 of 2)
Symbol
t
RAMP
(3)
Description
Power supply ramp time
Condition
Standard POR
Fast POR
Minimum
200 µs
200 µs
Typical
—
—
Maximum
100 ms
4 ms
Unit
—
—
Notes to
Table 3:
(1) If you do not use the design security feature in Arria V devices, connect V
CCBAT
to a 1.5-V, 2.5-V or 3.0-V power supply. Arria V power-on reset (POR)
circuitry monitors V
CCBAT
. Arria V devices do not exit POR if V
CCBAT
is not powered up.
(2) V
CCPD
must be 2.5 V when V
CCIO
is 2.5, 1.8, 1.5, 1.35, 1.25 or 1.2 V. V
CCPD
must be 3.0 V when V
CCIO
is 3.0 V. V
CCPD
must be 3.3 V when V
CCIO
is 3.3 V.
(3) This is also applicable to HPS power supply. For HPS power supply, refer to t
RAMP
specifications for standard POR when HPS_PORSEL = 0 and t
RAMP
specifications for fast POR when HPS_PORSEL = 1.
Table 4
lists recommended operating conditions for Arria V transceiver power
supplies.
Table 4. Transceiver Power Supply Operating Conditions for Arria V Devices
Symbol
V
CCA_GXBL
V
CCA_GXBR
V
CCR_GXBL
V
CCR_GXBR
V
CCR_GXBL
V
CCR_GXBR
V
CCT_GXBL
V
CCT_GXBR
V
CCT_GXBL
V
CCT_GXBR
V
CCH_GXBL
V
CCH_GXBR
V
CCL_GXBL
V
CCL_GXBR
V
CCL_GXBL
V
CCL_GXBR
Note to
Table 4:
(1) For data rate <=3.2 Gbps, connect V
CCR_GXBL/R
, V
CCT_GXBL/R
, or V
CCL_GXBL/R
to either 1.1-V or 1.15-V power supply. For data rate >3.2 Gbps,
connect V
CCR_GXBL/R
, V
CCT_GXBL/R
, or V
CCL_GXBL/R
to a 1.15-V power supply. For details, refer to the
Arria V GT, GX, ST, and SX Device Family Pin
Connection Guidelines.
Description
Transceiver high voltage power (left side)
Transceiver high voltage power (right side)
GX and SX speed grades—receiver power (left side)
GX and SX speed grades—receiver power (right side)
GT and ST speed grades—receiver power (left side)
GT and ST speed grades—receiver power (right side)
GX and SX speed grades—transmitter power (left side)
GX and SX speed grades—transmitter power (right side)
GT and ST speed grades—transmitter power (left side)
GT and ST speed grades—transmitter power (right side)
Transmitter output buffer power (left side)
Transmitter output buffer power (right side)
GX and SX speed grades—clock network power (left side)
GX and SX speed grades—clock network power (right side)
GT and ST speed grades—clock network power (left side)
GT and ST speed grades—clock network power (right side)
Minimum
2.375
1.08/1.12
1.17
1.08/1.12
1.17
1.425
1.08/1.12
1.17
Typical
2.500
1.1/1.15
(1)
1.20
1.1/1.15
(1)
1.20
1.500
1.1/1.15
(1)
1.20
Maximum
2.625
1.14/1.18
1.23
1.14/1.18
1.23
1.575
1.14/1.18
1.23
Unit
V
V
V
V
V
V
V
V
December 2013
Altera Corporation
Arria V GX, GT, SX, and ST Device Datasheet
Embedded System
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