February 2005
rev 1.5
ASM1832
3.3V µP Power Supply Monitor and Reset Circuit
Devices are available in 8-pin PDIP, 8-pin SO and compact 8-
pin MicroSO packages.
General Description
The ASM1832 is a fully integrated microprocessor supervisor. It
can halt and restart a “hung-up” microprocessor, restart a
microprocessor after a power failure. It has a watchdog timer
and external reset override. RESET and RESET outputs are
push-pull.
A
precision
temperature-compensated
reference
and
Key Features
•
•
•
•
•
•
•
•
•
•
•
3.3V supply monitor
Push-pull output
Selectable watchdog period
Debounce manual push-button reset input
Precision temperature-compensated voltage reference
and comparator.
Power-up, power-down and brown out detection
250ms minimum reset time
Active LOW and HIGH reset signal
Selectable trip point tolerance: 10% or 20%
Low-cost 8-pin DIP/SO and 8-pin Micro SO packages
Wide operating temperature -40°C to +85°C
comparator circuits monitor the 3.3V, V
CC
input voltage status.
During power-up or when the V
CC
power supply falls outside
selectable tolerance limits, both RESET and RESET become
active. When V
CC
rises above the threshold voltage, the reset
signals remain active for an additional 250ms minimum,
allowing the power supply and system microprocessor to
stabilize. The trip point tolerance signal, TOL, selects the trip
level tolerance to be either 10% or 20%.
A debounced manual reset input, PBRST, activates the reset
outputs for a minimum period of 250ms. There is a watchdog
timer to stop and restart a microprocessor that is “hung-up”.
The watchdog timeouts periods are selectable: 150ms, 610ms,
and 1200ms. If the ST input is not strobed LOW before the
time-out period expires, a reset is generated.
Applications
•
•
•
•
•
Microprocessor systems
Computers
Controllers
Portable instruments
Automotive systems
Typical Operating Circuit
3.3V
Block Diagram
ASM1832
Tolerance Selection
+
V
CC
40KΩ
PBRST
Push Button
Debounce
Voltage Sense
Comparator
Watchdog
Transition Detector
Reset &
Watchdog Timer
RESET
Reference
V
CC
V
CC
V
CC
ASM1832
ST
I/O
µP
TOL
RESET
-
RESET
GND
TD
TOL
RESET
TD
ST
GND
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
February 2005
rev 1.5
ASM1832
Pin Configuration
PBRST
TD
TOL
GND
1
2
3
4
8
V
CC
ST
RESET
RESET
ASM1832
7
6
5
Pin Description
Pin #
8-Pin Package
1
2
Pin Name
PBRST
TD
Function
Debounced manual pushbutton reset input.
Watchdog time delay selection. (t
TD
= 150ms for TD = GND, t
TD
= 610ms for
TD=Open, and t
TD
= 1200ms for TD = V
CC
).
Selects 10% (TOL connected to GND) or 20% (TOL connected to V
CC
) trip point
tolerance.
Ground.
Active HIGH reset output. RESET is active:
1. If V
CC
falls below the reset voltage trip point.
3
4
TOL
GND
5
RESET
2. If PBRST is LOW.
3. If ST is not strobed LOW before the timeout period set by TD expires.
4. During power-up.
Active LOW reset output. (See RESET).
Strobe input.
3.3V power.
6
7
8
RESET
ST
V
CC
3.3V µP Power Supply Monitor and Reset Circuit
Notice: The information in this document is subject to change without notice
2 of 9
February 2005
rev 1.5
ASM1832
.
the
microprocessor
or
Tolerance
Select
TOL = V
CC
TOL = GND
Tolerance
TRIP Point Voltage
(V)
Min
20%
10%
2.47
2.80
Nom
2.55
2.88
Max
2.64
2.97
Detailed Description
The
ASM1832
monitors
microcontroller power supply and issues reset signals, both
active HIGH and active LOW, that halt processor operation
whenever the power supply voltage levels are outside a
predetermined tolerance.
RESET and RESET outputs
RESET and RESET signals are active for a minimum of
250ms after the supply has returned to in-tolerance level.
This allows the power supply and monitored processor to
stabilize before instruction execution is allowed to begin.
Trip Point Tolerance Selection
The TOL input is used to determine the level V
CC
can vary
below 3.3V without asserting a reset. With TOL conected to
V
CC
, RESET and RESET become active whenever V
CC
falls
below 2.64V. RESET and RESET become active when the
V
CC
falls below 2.98V if TOL is connected to ground.
After V
CC
has risen above the trip point set by TOL, RESET
and RESET remain active for a minimum time period of
250ms. On power-down, once V
CC
falls below the reset
threshold RESET stays LOW and is guaranteed to be 0.4V or
less until V
CC
drops below 1.2V. The reset output on the
ASM1832 uses a push-pull drive stage that can maintain a
valid output below 1.2V. To sink current with V
CC
below 1.2V,
a resistor can be connected from the reset pin (RESET) to
Ground. This configuration will give a valid value on the reset
output with V
CC
approaching 0V. During both power up and
down, the configuration will draw current when the RESET is
in the high state. The value of 100KΩ should be adequate to
maintain a valid condition. The active HIGH reset signal is
valid down to a V
CC
level of 1.2V also.
t
R
V
CCTP
(MAX)
V
CCTP
(MIN)
~
~
V
CCTP
t
RPU
V
CC
V
OH
RESET
~
~
Figure 1: Timing Diagram : Power Up
V
OL
RESET
~
~
V
CC
V
CCTP
(MAX)
V
CCTP
V
CCTP
(MIN)
t
F
RESET
t
RPD
V
OH
V
OL
~~
~~
RESET
Figure 2: Timing Diagram : Power Down
ASM1832
RESET
100kΩ
Microprocessor
RESET
Application Information
Manual Reset Operation
Push-button switch input, PBRST, allows the user to override
the internal trip point detection circuits and issue reset
~
3.3V µP Power Supply Monitor and Reset Circuit
Notice: The information in this document is subject to change without notice
3 of 9
February 2005
rev 1.5
signals. The pushbutton input is debounced and is pulled
HIGH through an internal 40kΩ resistor.
When PBRST is held LOW for the minimum time t
PB
, both
resets become active and remain active for a minimum time
period of 250ms after PBRST returns HIGH.
ASM1832
minimum timeout period, reset signals become active. On
power-up after the supply voltage returns to an in-tolerance
condition, the reset signal remains active for 250ms
minimum,
allowing
the
power
supply
and
system
microprocessor to stabilize.
ST Pulses as short as 20ns can be detected.
The debounced input is guaranteed to recognize pulses
greater than 20ms. No external pull-up resistor is required,
since PBRST is pulled HIGH by an internal 40kΩ resistor.
The PBRST can be driven from a TTL or CMOS logic line or
shorted to ground with a mechanical switch.
RESET
ST
Valid
Strobe
Valid
Strobe
Invalid
Strobe
t
ST
t
RST
t
TD
(min)
t
TD
(max)
~
~
PBRST
t
PDLY
V
IL
t
PB
V
IH
Note: ST is ignored whenever a reset is active
Figure 5: Timing Diagram: Strobe Input
Timeouts periods of approximately 150ms, 610ms or
1,200ms are selected through the TD pin.
~
~
t
RST
RESET
RESET
TD Voltage level
V
OH
V
OL
Watchdog Time-out Period
(ms)
Min
Nom
150
610
1200
Max
250
1000
2000
Figure 3: Timing Diagram: Pushbutton Reset
~~
~~
Supply
Voltage
ASM1832
1
2
3
4
PBRST
T
D
TOL
GND
V
CC
8
ST
RESET
RESET
GND
Floating
V
CC
62.5
250
500
The watchdog timer can not be disabled. It must be strobed
with a high-to-low transition to avoid watchdog timeout and
I/O
7
6
5
reset.
µP
Supply
Voltage
ASM1832
1
2
3
4
PBRST
T
D
TOL
GND
V
CC
8
ST
RESET
RESET
MREQ
RESET
Figure 4: Application Circuit: Pushbutton Reset
7
6
5
µP
RESET
Address
Bus
Watchdog Timer and ST Input
A watchdog timer stops and restarts a microprocessor that is
“hung-up”. The µP must toggle the ST input within a set
period (as selectable through TD input) to verify proper
software execution. If the ST is not toggled low within the
Decoder
Figure 6: Application Circuit: Watchdog Timer
3.3V µP Power Supply Monitor and Reset Circuit
Notice: The information in this document is subject to change without notice
4 of 9
February 2005
rev 1.5
ASM1832
Absolute Maximum Ratings
Parameter
Voltage on VCC
Voltage on ST, TD
Voltage on PBRST, RESET, RESET
Operating Temperature Range
Soldering Temperature (for 10 sec)
Storage Temperature
ESD rating
HBM
MM
Min
-0.5
-0.5
-0.5
-40
Max
7
V
CC
+ 0.5
V
CC
+ 0.5
+85
+260
Unit
V
V
V
°C
°C
°C
KV
V
-55
+125
2
200
Note:
1. Voltages are measured with respect to ground
2. These are stress ratings only and functional implication is not implied. Exposure to absolute maxi-
mum ratings for extended periods may affect device reliability.
DC Electrical Characteristics
Unless otherwise stated, 1.2 <= V
CC
<=5.5V and over the operating temperature range of -40°C to +85°C. All voltages are
referenced to ground.
Parameter
Supply Voltage
ST and PBRST Input High
Level
ST and PBRST Input High
Level
ST and PBRST Input Low
Level
V
CC
Trip Point (T
OL
= GND)
V
CC
Trip Point (T
OL
= V
CC
)
Watchdog Timeout Period
Symbol
V
CC
V
IH
V
IH
V
IL
V
CCTP
V
CCTP
t
TD
Conditions
Min
1.0
Typ
Max
5.5
V
CC
+ 0.3
Unit
V
V
V
V
CC
>=2.7V
V
CC
<2.7V
2
V
CC
- 0.4V
-0.3
2.80
2.47
2.88
2.55
150
0.5
2.97
2.64
250
V
V
V
ms
T
D
= GND
62.5
3.3V µP Power Supply Monitor and Reset Circuit
Notice: The information in this document is subject to change without notice
5 of 9
京公网安备 11010802033920号
EEWORLD
