ASM3P2508SP datasheet, PDF - EEWORLD Datasheet

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ASM3P2508SP: DescriptionClock Synthesizer and Frequency Generator with Peak EMI reduction; File Size302KB，7 Pages; ManufacturerALSC [Alliance Semiconductor Corporation]

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ASM3P2508SP Overview

Clock Synthesizer and Frequency Generator with Peak EMI reduction

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February 2005

rev 0.4

ASM3P2508SP

Clock Synthesizer and Frequency Generator with Peak EMI reduction

Features

Dual PLL based Architecture

Operates with a 3.3V ±0.3V supply.

Generates an EMI optimized Spread Spectrum

PCI Clock output

Generates a high accuracy non Spread T1 clock of

±25ppm accuracy.

Generates a non spread system reference clock

Low power CMOS design.

Input frequency: 25 MHz.

Outputs:

Sys_ REF_CLK: 20 MHz

T1 Clock: 25 MHz (±25 ppm)

PCI_CLK: 33.33MHz Spread Spectrum

Frequency deviation: -0.5% (Typ).

Available in 8L SOIC Package.

The

ASM3P2508SP

uses

the

most

efficient

and

optimized modulation profile approved by the FCC.

ASM3P2508SP modulates the output of a PLL in order to

“spread” the bandwidth of a synthesized clock, and more

importantly, decreases the peak amplitudes of its

harmonics. This results in a significantly lower system

EMI compared to the typical narrow band signal produced

by oscillators and most frequency generators. Lowering

EMI by increasing a signal’s bandwidth is called ‘spread

spectrum clock generation’ (SSCG).

addition

the

SSCG

output,

ASM3P2508SP

generates two high accuracy clock signals -

T1 Clock @ 25.00MHz with +/- 25ppm stability, and a

20MHz Sys_ REF_CLK.

Applications

The ASM3P2508SP is targeted towards Consumer,

Industrial, Data and Telecommunications applications.

Product Description

The ASM3P2508SP is a versatile Dual PLL based Clock

Synthesizer and Frequency Generator optimised and

designed specifically for three clock frequencies. The

PCI_CLK

output

from

ASM3P2508SP

reduces

Key Specifications

Description

Supply voltages

Input Frequency

Cycle-to-Cycle Jitter

Output Duty Cycle

Output Rise and Fall Time

SSC Modulation Rate

SSC Frequency Deviation

Specification

= 3.3V ±0.3V

25 MHz

175 pS ( Max)

45/55%

1.1 nS (Max)

30KHz (Typ)

-0.5% (Typ)

electromagnetic interference (EMI) at the clock source,

allowing system wide reduction of EMI of all clock

dependent signals. ASM3P2508SP allows significant

system cost savings by reducing the number of circuit

board

layers,

ferrite

beads

shielding

that

are

traditionally required to pass EMI regulations.

Block Diagram

PWRDNB

T1_CLK

Input

Divider

PLL 1

Output

Divider

Sys_REF_CLK

XIN/CLKIN

Osc

XOUT

PLL 2

Output

Divider

PCI_CLK

Modulation

Alliance Semiconductor

2575, Augustine Drive

•

Santa Clara, CA

•

Tel: 408.855.4900

•

Fax: 408.855.4999

•

www.alsc.com

Notice: The information in this document is subject to change without notice.

ASM3P2508SP Related Products

	ASM3P2508SP	ASM3I2508SP-08SR	ASM3I2508SPF-08SR	ASM3I2508SP-08ST	ASM3I2508SPF-08ST	ASM3P2508SP-08SR	ASM3P2508SP-08ST	ASM3P2508SPF-08SR	ASM3P2508SPF-08ST
Description	Clock Synthesizer and Frequency Generator with Peak EMI reduction	Clock Synthesizer and Frequency Generator with Peak EMI reduction	Clock Synthesizer and Frequency Generator with Peak EMI reduction	Clock Synthesizer and Frequency Generator with Peak EMI reduction	Clock Synthesizer and Frequency Generator with Peak EMI reduction	Clock Synthesizer and Frequency Generator with Peak EMI reduction	Clock Synthesizer and Frequency Generator with Peak EMI reduction	Clock Synthesizer and Frequency Generator with Peak EMI reduction	Clock Synthesizer and Frequency Generator with Peak EMI reduction
Is it Rohs certified?	-	incompatible	conform to	incompatible	conform to	incompatible	incompatible	conform to	conform to
Maker	-	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]	ALSC [Alliance Semiconductor Corporation]
Parts packaging code	-	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC
package instruction	-	SOP,	SOP,	SOP,	SOP,	SOP,	SOP,	SOP,	SOP,
Contacts	-	8	8	8	8	8	8	8	8
Reach Compliance Code	-	unknown	unknow	unknow	unknow	unknow	unknow	unknow	unknow
ECCN code	-	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
JESD-30 code	-	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609 code	-	e0	e3	e0	e3	e0	e0	e3/e6	e3/e6
length	-	4.9 mm	4.9 mm	4.9 mm	4.9 mm	4.9 mm	4.9 mm	4.9 mm	4.9 mm
Number of terminals	-	8	8	8	8	8	8	8	8
Maximum operating temperature	-	85 °C	85 °C	85 °C	85 °C	70 °C	70 °C	70 °C	70 °C
Maximum output clock frequency	-	33.33 MHz	33.33 MHz	33.33 MHz	33.33 MHz	33.33 MHz	33.33 MHz	33.33 MHz	33.33 MHz
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	SOP	SOP	SOP	SOP	SOP	SOP	SOP	SOP
Package shape	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	-	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	250	NOT SPECIFIED	250	NOT SPECIFIED	NOT SPECIFIED	260	260
Master clock/crystal nominal frequency	-	25 MHz	25 MHz	25 MHz	25 MHz	25 MHz	25 MHz	25 MHz	25 MHz
Certification status	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	-	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage	-	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage	-	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage	-	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	-	YES	YES	YES	YES	YES	YES	YES	YES
technology	-	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	-	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	-	TIN LEAD	MATTE TIN	TIN LEAD	MATTE TIN	TIN LEAD	TIN LEAD	MATTE TIN/TIN BISMUTH	MATTE TIN/TIN BISMUTH
Terminal form	-	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	-	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	-	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	-	NOT SPECIFIED	40	NOT SPECIFIED	40	NOT SPECIFIED	NOT SPECIFIED	40	40
width	-	3.91 mm	3.91 mm	3.91 mm	3.91 mm	3.91 mm	3.91 mm	3.91 mm	3.91 mm
uPs/uCs/peripheral integrated circuit type	-	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER

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