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ASM3P2762A

Description
Low Power Peak EMI Reducing Solution
File Size178KB,12 Pages
ManufacturerALSC [Alliance Semiconductor Corporation]
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ASM3P2762A Overview

Low Power Peak EMI Reducing Solution

September 2005
rev 1.6
Low Power Peak EMI Reducing Solution
Features
Generates an EMI optimized clock signal at the
output.
Integrated loop filter components.
Operates with a 3.3V /2.5V Supply.
Operating current less than 6mA.
Low power CMOS design.
Input frequency range: 6MHz to 12MHz for 2.5V
: 6MHz to 13MHz for 3.3V
Generates a 1X low EMI spread spectrum clock of
the input frequency.
Frequency deviation: -1.25% (Typ) @ 10MHz Input
Frequency
Available in 6-pin TSOT-23, 8-pin SOIC and 8-pin
TSSOP packages.
ASM3P2762A
The ASM3P2762A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all digital method.
The ASM3P2762A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
The ASM3P2762A is targeted towards all portable
devices with very low power requirements like MP3
players and digital still cameras.
Product Description
The ASM3P2762A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of clock frequencies. The ASM3P2762A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of
all clock
dependent signals. The ASM3P2762A allows significant
system cost savings by reducing the number of circuit
board layers ferrite beads, shielding that are traditionally
required to pass EMI regulations.
Key Specifications
Description
Supply voltages
Cycle-to-Cycle Jitter
Output Duty Cycle
Modulation Rate Equation
Frequency Deviation
Specification
V
DD
= 3.3V /2.5V
200pS (Max)
45/55%
F
IN
/256
-1.25% (Typ) @ 10MHz
Block Diagram
V
DD
PD
XIN
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Modulation
PLL
XOUT
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
V
SS
Alliance Semiconductor
2575 Augustine Drive
Santa Clara, CA
Tel: 408.855.4900
Fax: 408.855.4999
www.alsc.com
Notice: The information in this document is subject to change without notice.

ASM3P2762A Related Products

ASM3P2762A ASM3I2762A-06OR ASM3I2762A-08ST ASM3I2762AG-06OR ASM3I2762AF-08TR ASM3I2762AG-08SR
Description Low Power Peak EMI Reducing Solution Low Power Peak EMI Reducing Solution Low Power Peak EMI Reducing Solution Low Power Peak EMI Reducing Solution Low Power Peak EMI Reducing Solution Low Power Peak EMI Reducing Solution
Is it Rohs certified? - incompatible incompatible conform to conform to conform to
Maker - ALSC [Alliance Semiconductor Corporation] ALSC [Alliance Semiconductor Corporation] ALSC [Alliance Semiconductor Corporation] ALSC [Alliance Semiconductor Corporation] ALSC [Alliance Semiconductor Corporation]
Parts packaging code - SOT-23 SOIC SOT-23 SOIC SOIC
package instruction - VSSOP, TSOP6,.11,37 SOP, SOP8,.25 VSSOP, TSOP6,.11,37 TSSOP, TSSOP8,.25 SOP, SOP8,.25
Contacts - 6 8 6 8 8
Reach Compliance Code - unknow unknow unknow unknow unknow
ECCN code - EAR99 EAR99 EAR99 EAR99 EAR99
Other features - ALSO OPERATES AT 2.5V SUPPLY ALSO OPERATES AT 2.5V SUPPLY ALSO OPERATES AT 2.5V SUPPLY ALSO OPERATES AT 2.5V SUPPLY ALSO OPERATES AT 2.5V SUPPLY
JESD-30 code - R-PDSO-G6 R-PDSO-G8 R-PDSO-G6 R-PDSO-G8 R-PDSO-G8
length - 2.9 mm 4.9 mm 2.9 mm 4.4 mm 4.9 mm
Number of terminals - 6 8 6 8 8
Maximum operating temperature - 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature - -40 °C -40 °C -40 °C -40 °C -40 °C
Maximum output clock frequency - 13 MHz 13 MHz 13 MHz 13 MHz 13 MHz
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - VSSOP SOP VSSOP TSSOP SOP
Encapsulate equivalent code - TSOP6,.11,37 SOP8,.25 TSOP6,.11,37 TSSOP8,.25 SOP8,.25
Package shape - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form - SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
power supply - 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V
Master clock/crystal nominal frequency - 13 MHz 13 MHz 13 MHz 13 MHz 13 MHz
Certification status - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height - 1 mm 1.75 mm 1 mm 1.1 mm 1.75 mm
Maximum supply voltage - 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage - 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
Nominal supply voltage - 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount - YES YES YES YES YES
technology - CMOS CMOS CMOS CMOS CMOS
Temperature level - INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form - GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch - 0.95 mm 1.27 mm 0.95 mm 0.65 mm 1.27 mm
Terminal location - DUAL DUAL DUAL DUAL DUAL
width - 1.6 mm 3.91 mm 1.6 mm 3 mm 3.91 mm
uPs/uCs/peripheral integrated circuit type - CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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