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ASM5I23S04A-5H-08-ST

Description
3.3 V SpreadTrak Zero Delay Buffer
Categorylogic    logic   
File Size208KB,13 Pages
ManufacturerALSC [Alliance Semiconductor Corporation]
Download Datasheet Parametric Compare View All

ASM5I23S04A-5H-08-ST Overview

3.3 V SpreadTrak Zero Delay Buffer

ASM5I23S04A-5H-08-ST Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerALSC [Alliance Semiconductor Corporation]
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Reach Compliance Codeunknow
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length4.89 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
MaximumI(ol)0.012 A
Number of functions1
Number of inverted outputs
Number of terminals8
Actual output times4
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.2 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9116 mm
minfmax133.3 MHz
August 2004
rev 2.0
3.3 V
‘SpreadTrak’ Zero Delay Buffer
Features
Zero input - output propagation delay,
adjustable by capacitive load on FBK input.
Multiple configurations -
Refer “ASM5P23S04A
Configurations Table”.
Input frequency range: 10MHz to 133MHz
Multiple low-skew outputs.
Output-output skew less than 200 ps.
Device-device skew less than 500 ps.
Two banks of four outputs.
Less than 200 ps cycle-to-cycle jitter
Available in space saving, 8-pin 150-mil SOIC
packages.
3.3V operation.
Advanced 0.35µ CMOS technology.
Industrial temperature available.
‘SpreadTrak’
Functional Description
ASM5P23S04A is a versatile, 3.3V zero-delay buffer
designed
to
distribute
high-speed
clocks
in
PC,
workstation, datacom, telecom and other high-performance
applications. It is available in a 8-pin package. The part has
an on-chip PLL which locks to an input clock presented on
the REF pin. The PLL feedback is required to be driven to
ASMP5P23S04A
FBK pin, and can be obtained from one of the outputs. The
input-to-output propagation delay is guaranteed to be less
than 250ps, and the output-to-output skew is guaranteed to
be less than 200ps.
The ASM5P23S04A has two banks of two outputs each.
Multiple ASM5P23S04A devices can accept the same input
clock and distribute it. In this case the skew between the
outputs of the two devices is guaranteed to be less than
500ps.
The
ASM5P23S04A
(Refer
is
available
in
two
different
configurations
“ASM5P23S04A
Configurations
Table). The ASM5P23S04A-1 is the base part, where the
output frequencies equal the reference if there is no
counter in the feedback path. The ASM5P23S04A-1H is
the high-drive version of the -1 and the rise and fall times
on this device are much faster.
The ASM5P23S04A-2 allows the user to obtain Ref, 1/2 X
and 2X frequencies on each output bank. The exact
configuration and output frequencies depend on which
output drives the feedback pin. The ASM5P23S04A-5H is a
high-drive version with REF/2 on both banks
Block Diagram
FBK
CLKA1
REF
PLL
CLKA2
/2
Extra Divider (-2)
CLKB1
CLKB2
Alliance Semiconductor
2575, Augustine Drive
Santa Clara, CA
Tel: 408.855.4900
Fax: 408.855.4999
www.alsc.com
Notice: The information in this document is subject to change without notice.

ASM5I23S04A-5H-08-ST Related Products

ASM5I23S04A-5H-08-ST ASMP5P23S04A ASM5I23S04A-5H-08-SR ASM5P23S04A-5H-08-ST
Description 3.3 V SpreadTrak Zero Delay Buffer 3.3 V SpreadTrak Zero Delay Buffer 3.3 V SpreadTrak Zero Delay Buffer 3.3 V SpreadTrak Zero Delay Buffer
Is it Rohs certified? incompatible - incompatible incompatible
Maker ALSC [Alliance Semiconductor Corporation] - ALSC [Alliance Semiconductor Corporation] ALSC [Alliance Semiconductor Corporation]
Parts packaging code SOIC - SOIC SOIC
package instruction SOP, SOP8,.25 - SOP, SOP8,.25 SOP, SOP8,.25
Contacts 8 - 8 8
Reach Compliance Code unknow - unknow unknow
Input adjustment STANDARD - STANDARD STANDARD
JESD-30 code R-PDSO-G8 - R-PDSO-G8 R-PDSO-G8
JESD-609 code e0 - e0 e0
length 4.89 mm - 4.89 mm 4.89 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER - PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
MaximumI(ol) 0.012 A - 0.012 A 0.012 A
Number of functions 1 - 1 1
Number of terminals 8 - 8 8
Actual output times 4 - 4 4
Maximum operating temperature 85 °C - 85 °C 70 °C
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP - SOP SOP
Encapsulate equivalent code SOP8,.25 - SOP8,.25 SOP8,.25
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE - SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
power supply 3.3 V - 3.3 V 3.3 V
Certification status Not Qualified - Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.2 ns - 0.2 ns 0.2 ns
Maximum seat height 1.75 mm - 1.75 mm 1.75 mm
Maximum supply voltage (Vsup) 3.6 V - 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V - 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V - 3.3 V 3.3 V
surface mount YES - YES YES
technology CMOS - CMOS CMOS
Temperature level INDUSTRIAL - INDUSTRIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING - GULL WING GULL WING
Terminal pitch 1.27 mm - 1.27 mm 1.27 mm
Terminal location DUAL - DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
width 3.9116 mm - 3.9116 mm 3.9116 mm
minfmax 133.3 MHz - 133.3 MHz 133.3 MHz
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