IDT71V67813S183BG datasheet, PDF

Datasheet> All Categories > storage> storage> IDT71V67813S183BG

IDT71V67813S183BG: DescriptionCache SRAM, 512KX18, 3.3ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119; Categorystorage storage; File Size510KB，23 Pages; ManufacturerIDT (Integrated Device Technology)

Download Datasheet Parametric Compare View All

IDT71V67813S183BG Overview

Cache SRAM, 512KX18, 3.3ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119

IDT71V67813S183BG Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	BGA
package instruction	BGA,
Contacts	119
Reach Compliance Code	compli
ECCN code	3A991.B.2.A
Maximum access time	3.3 ns
JESD-30 code	R-PBGA-B119
JESD-609 code	e0
length	22 mm
memory density	9437184 bi
Memory IC Type	CACHE SRAM
memory width	18
Humidity sensitivity level	3
Number of functions	1
Number of terminals	119
word count	524288 words
character code	512000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512KX18
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	RECTANGULAR
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	2.36 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	20
width	14 mm

Preview

Download Datasheet

View All

256K X 36, 512K X 18

3.3V Synchronous SRAMs

3.3V I/O, Burst Counter

Pipelined Outputs, Single Cycle Deselect

Features

256K x 36, 512K x 18 memory configurations

Supports high system speed:

– 200MHz 3.1ns clock access time

– 183MHz 3.3ns clock access time

LBO

input selects interleaved or linear burst mode

Self-timed write cycle with global write control (GW), byte

write enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

3.3V I/O supply (V

DDQ

)

Packaged in a JEDEC Standard 100-pin thin plastic quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch

ball grid array (fBGA).

Advance

Information

IDT71V67613

IDT71V67813

Description

The IDT71V67613/7813 are high-speed SRAMs organized as

256K x 36/512K x 18. The IDT71V67613/7813 SRAMs contain write,

data, address and control registers. Internal logic allows the SRAM to

generate a self-timed write based upon a decision which can be left until

the end of the write cycle.

The burst mode feature offers the highest level of performance to the

system designer, as the IDT71V67613/7813 can provide four cycles of

data for a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will be pipelined for one

cycle before it is available on the next rising clock edge. If burst mode

operation is selected (ADV=LOW), the subsequent three cycles of output

data will be available to the user on the next three rising clock edges. The

order of these three addresses are defined by the internal burst counter

and the

LBO

input pin.

The IDT71V67613/7813 SRAMs utilize IDT’s latest high-performance

CMOS process and are packaged in a JEDEC standard 14mm x 20mm

100-pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array

(BGA) and 165 fine pitch ball grid array (fBGA).

Pin Description Summary

-A

BWE

(1)

CLK

ADV

ADSC

ADSP

LBO

TMS

TDI

TCK

TDO

I/O

-I/O

, I/O

-I/O

, V

DDQ

Address Inputs

Chip Enable

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Sleep Mode

Test Mode Select

Test Data Input

Test Clock

Test Data Output

Data Input / Output

Core Power, I/O Power

Ground

Input

Output

I/O

Supply

Synchronous

Asynchronous

Synchronous

N/A

Synchronous

Asynchronous

N/A

Synchronous

N/A

5312 tbl 01

NOTE:

and

are not applicable for the IDT71V67813.

JULY 2001

DSC-5312/01

IDT71V67813S183BG Related Products

	IDT71V67813S183BG	IDT71V67613S200PF	IDT71V67813S183BQ	IDT71V67613S183BG
Description	Cache SRAM, 512KX18, 3.3ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119	Cache SRAM, 256KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 512KX18, 3.3ns, CMOS, PBGA165, 13 X 15 MM, FINE PITCH, BGA-165	Cache SRAM, 256KX36, 3.3ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	BGA	QFP	BGA	BGA
package instruction	BGA,	LQFP,	TBGA,	BGA,
Contacts	119	100	165	119
Reach Compliance Code	compli	compliant	compliant	compliant
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	3.3 ns	3.1 ns	3.3 ns	3.3 ns
JESD-30 code	R-PBGA-B119	R-PQFP-G100	R-PBGA-B165	R-PBGA-B119
JESD-609 code	e0	e0	e0	e0
length	22 mm	20 mm	15 mm	22 mm
memory density	9437184 bi	9437184 bit	9437184 bit	9437184 bit
Memory IC Type	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM
memory width	18	36	18	36
Humidity sensitivity level	3	3	3	3
Number of functions	1	1	1	1
Number of terminals	119	100	165	119
word count	524288 words	262144 words	524288 words	262144 words
character code	512000	256000	512000	256000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C
organize	512KX18	256KX36	512KX18	256KX36
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	BGA	LQFP	TBGA	BGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY	FLATPACK, LOW PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	225	240	225	225
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	2.36 mm	1.6 mm	1.2 mm	2.36 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	TIN LEAD	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	BALL	GULL WING	BALL	BALL
Terminal pitch	1.27 mm	0.65 mm	1 mm	1.27 mm
Terminal location	BOTTOM	QUAD	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	20	20	20	20
width	14 mm	14 mm	13 mm	14 mm

Recommended Resources

Basic circuit of 555 multivibrator

Water level alarm circuit diagram

Manual control Y-step-down starting

Constant voltage source with current limit function

Blind Pathfinder Part 2

Three-phase motor utilizes 36V low voltage control circuit

About the torque of stepper motor: My stepper motor is 42BYGH3404, with a static torque of 2.6kg.cm. The driver chip used is 2803. I am using it to turn a wheel with a radius of 8cm and a weight of 0.25KG. It has very little driving fo...; yangxuetao Embedded System

Confused, what is an oscilloscope with a Z axis? Don't worry, here is an introduction: In addition to the usual 500MHZ digital oscilloscope, this year's national competition list also includes an oscilloscope with a Z-axis input terminal???? What the hell is this with a Z-axis? Some net...; okhxyyo Electronics Design Contest

PCB Design MOEMS Device Technology and Packaging (Part 1): 1 Introduction Micro opto-electro-mechanical system (MOEMS) is an emerging technology that has become one of the hottest technologies in the world. MOEMS is a micro-electro-mechanical system (MEMS) th...; ESD技术咨询 PCB Design

Can anyone recommend some light books to read?: I don't want to read documents on the subway anymore. Can anyone recommend some easy-to-read books? If not, novels are fine. :) :loveliness:...; henryli2008 Talking

The program is too large and CCS cannot burn it.: Is there a limit on the program size in the free version of CCS? If I write a program that exceeds the limit, the compiler will report an error. If this happens, is it only possible to port the progra...; 木木木JS MCU

It is suggested to adjust the position of the "Awards Zone" section: [i=s]This post was last edited by lkl0305 on 2014-3-28 22:46[/i] Today I wanted to check out the "Awards Zone", but I couldn't find it after searching the community navigation for a long time. I searc...; lkl0305 Suggestions & Announcements

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components