L7C186HC12 datasheet, PDF - EEWORLD Datasheet

L7C186HC12: DescriptionStandard SRAM, 8KX8, 12ns, CMOS, CDIP28, 0.600 INCH, HERMETIC SEALED, SIDE BRAZED, DIP-28; Categorystorage storage; File Size340KB，8 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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L7C186HC12 Overview

Standard SRAM, 8KX8, 12ns, CMOS, CDIP28, 0.600 INCH, HERMETIC SEALED, SIDE BRAZED, DIP-28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	DIP
package instruction	DIP,
Contacts	28
Reach Compliance Code	unknow
ECCN code	EAR99
Maximum access time	12 ns
Other features	AUTOMATIC POWER-DOWN; FLASH CLEAR
JESD-30 code	R-CDIP-T28
length	35.56 mm
memory density	65536 bi
Memory IC Type	STANDARD SRAM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of ports	1
Number of terminals	28
word count	8192 words
character code	8000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	8KX8
Output characteristics	3-STATE
Exportable	YES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	4.953 mm
Minimum standby current	2 V
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm

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