EDB8132B3MC-8D-F datasheet, PDF

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EDB8132B3MC-8D-F: DescriptionDDR DRAM, 256MX32, CMOS, PBGA134, 11.50 X 11.50 MM, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, FBGA-134; Categorystorage storage; File Size213KB，20 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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EDB8132B3MC-8D-F Overview

DDR DRAM, 256MX32, CMOS, PBGA134, 11.50 X 11.50 MM, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, FBGA-134

EDB8132B3MC-8D-F Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Micron Technology
package instruction	VFBGA,
Reach Compliance Code	compli
access mode	DUAL BANK PAGE BURST
Other features	AUTO/SELF REFRESH; IT ALSO REQUIRES 1.8V NOM
JESD-30 code	S-PBGA-B134
length	11.5 mm
memory density	8589934592 bi
Memory IC Type	DDR DRAM
memory width	32
Number of functions	1
Number of ports	1
Number of terminals	134
word count	268435456 words
character code	256000000
Operating mode	SYNCHRONOUS
organize	256MX32
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Package shape	SQUARE
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum seat height	0.9 mm
self refresh	YES
Maximum supply voltage (Vsup)	1.3 V
Minimum supply voltage (Vsup)	1.14 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	0.65 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.5 mm

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DATA SHEET

8G bits DDR2 Mobile RAM™, DDP

EDB8132B3MC (256M words × 32 bits)

Specifications

• Density: 8G bits

• Organization

— 16M words × 32 bits × 8 banks × 2 ranks

— 2 pieces of 4Gb (×32) in one package

• Data rate: 1066Mbps (max.)

• Package

— 134-ball FBGA, DDP (Dual Die Package)

— Package size: 11.5mm × 11.5mm

— Ball pitch: 0.65mm

— Lead-free (RoHS compliant) and Halogen-free

• Power supply

— VDD1 = 1.70V to 1.95V

— VDD2, VDDQ = 1.14V to 1.30V

• Interface: HSUL_12

• Operating case temperature range

— TC = -30°C to +85°C

Features

• JEDEC LPDDR2-S4B compliance

• DLL is not implemented

• Low power consumption

• Mobile RAM functions

— Partial Array Self-Refresh (PASR)

— Auto Temperature Compensated Self-Refresh

(ATCSR) by built-in temperature sensor

— Deep power-down mode

— Per Bank Refresh

Block Diagram

CKE0 /CS0

VDD1

VDD2

VDDQ

VREFCA

VREFDQ

VSS

CK, /CK

CA0 to CA9

CKE1 /CS1

4G bits

(128M x 32)

4G bits

(128M x 32)

DQS0 to DQS3

/DQS0 to /DQS3

DQ0 to DQ31

DM0 to DM3

Document No. E1852E20 (Ver. 2.0)

Date Published January 2012 (K) Japan

Printed in Japan

URL: http://www.elpida.com



Elpida Memory, Inc. 2011-2012

EDB8132B3MC

CONTENTS

Specifications ........................................................................................................................................ 1

Block Diagram ....................................................................................................................................... 1

Features ................................................................................................................................................ 1

Ordering Information ............................................................................................................................. 2

Part Number .......................................................................................................................................... 2

Pin Configurations ................................................................................................................................. 4

Pin Descriptions .................................................................................................................................... 5

Pin Capacitance .................................................................................................................................... 6

Package Drawing .................................................................................................................................. 7

Mode Register Specification ................................................................................................................. 8

1. Electrical Conditions ...................................................................................................................... 9

1.1 Absolute Maximum Ratings .............................................................................................. 9

1.2 Recommended DC Operating Conditions ........................................................................ 9

2. Electrical Specifications ............................................................................................................... 10

2.1 DC Characteristics 1 ....................................................................................................... 10

2.2 DC Characteristics 2 ....................................................................................................... 12

2.3 AC Characteristics .......................................................................................................... 13

Data Sheet E1852E20 (Ver. 2.0)

EDB8132B3MC-8D-F Related Products

	EDB8132B3MC-8D-F	EDB8132B3MC-1D-F
Description	DDR DRAM, 256MX32, CMOS, PBGA134, 11.50 X 11.50 MM, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, FBGA-134	DDR DRAM, 256MX32, CMOS, PBGA134, 11.50 X 11.50 MM, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, FBGA-134
Is it Rohs certified?	conform to	conform to
Maker	Micron Technology	Micron Technology
package instruction	VFBGA,	VFBGA,
Reach Compliance Code	compli	compli
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Other features	AUTO/SELF REFRESH; IT ALSO REQUIRES 1.8V NOM	AUTO/SELF REFRESH; IT ALSO REQUIRES 1.8V NOM
JESD-30 code	S-PBGA-B134	S-PBGA-B134
length	11.5 mm	11.5 mm
memory density	8589934592 bi	8589934592 bi
Memory IC Type	DDR DRAM	DDR DRAM
memory width	32	32
Number of functions	1	1
Number of ports	1	1
Number of terminals	134	134
word count	268435456 words	268435456 words
character code	256000000	256000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS
organize	256MX32	256MX32
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VFBGA	VFBGA
Package shape	SQUARE	SQUARE
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
Maximum seat height	0.9 mm	0.9 mm
self refresh	YES	YES
Maximum supply voltage (Vsup)	1.3 V	1.3 V
Minimum supply voltage (Vsup)	1.14 V	1.14 V
Nominal supply voltage (Vsup)	1.2 V	1.2 V
surface mount	YES	YES
technology	CMOS	CMOS
Terminal form	BALL	BALL
Terminal pitch	0.65 mm	0.65 mm
Terminal location	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	11.5 mm	11.5 mm

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