Si3217x
Si3291x
P
RO
SLIC
®
S
INGLE
-C
HIP
FXS S
OLUTION
Si3217x Features
Performs all BORSCHT functions
Ideal for short to medium loops
Global programmability
Simplified configuration and diagnostics
Supported by ProSLIC API
Low power standby operation
W IT H
FXO O
PTION
Tracking dc-dc controller
Patented low-power ringing
Wideband voice support
DTMF detection
Pulse metering
3.3 V operation
Pb-free/RoHS-compliant packaging
Si3291x Features
Greater than 5 kV isolation
Global programmability
Up to +6 dBm TX/RX level
Parallel handset detection
Type I and II caller ID support
Integrated ring detector
Programmable digital hybrid
Applications
Customer Premise Equipment (CPE)
VoIP DSL Gateways and Routers
Wireless Local Loop (WLL)
Ordering Information
Integrated Access Devices (IAD)
Analog Terminal Adapters (ATA)
Small Office/Home Office (SOHO)
PBX
See page 48.
Pin Assignments
Si3217x
EPAD2
RING
VBAT
35
34
TIP
NC
NC
NC
Description
The Si3217x is a family of pin-compatible single-channel ProSLIC products that
implement a complete foreign exchange station (FXS) telephony interface solution in
accordance with all relevant LSSGR, ITU, and ETSI specifications. Select parts in
the series also implement Silicon Laboratories' patented capacitive isolation
technology to enable seamless connection to Si3291x series foreign exchange office
(FXO) line-side devices. The Si3217x ProSLIC ICs operate from a 3.3 V supply and
interface to standard PCM/SPI digital interfaces. The Si3217x integrated dc-dc
controller automatically generates the optimal battery voltages required for each line-
state. Si3217x ICs are available with voltage ratings of –110 V or –135 V to support a
wide range of ringing voltages. See the Ordering Guide for the voltage rating of each
Si3217x version. The Si3217x is available in a 5 x 7 mm 42-pin QFN package. The
Si3291x is available in a 16-pin SOIC package.
VDDHV
SDI
SDO
SCLK
SDITHRU
CS
FSYNC
PCLK
INT
C2A/NC
C1A/NC
DTX
DRX
DCFF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
42 41 40 39 38 37 36
NC
GPIO1/STIPC
GPIO2/SRINGC
SRINGDC
SRINGAC
STIPAC
STIPDC
VDDA
QGND
IREF
CAPM
CAPP
CAPLB
SVBAT
EPAD2
33
32
31
30
29
28
EPAD1
27
26
25
24
23
15 16 17 18 19 20 21
SDCH
VDDREG
VDDD
SDCL
DCDRV
RST
SVDC
22
Functional Block Diagram
QE
DCT
RX
IB
C1B
C2B
VREG
RNG1
1
2
3
4
5
6
7
8
Si3291x
CODEC
ADC
ADC
DAC
DAC
SLIC
Linefeed
Linefeed
Control
Linefeed
Monitor
DRX
DTX
CS
SDI
SDO
SCLK
INT
RST
DTMF &
Tone Gen
Caller ID
Programmable
Programmable
AC Impedance
AC Impedance
and Hybrid
FSYNC
PCM/
GCI
Interface
TIP
RING
FXS
SPI
Control
Interface
Ringing
Generator
DSP
Optional FXO
Isolation
Interface
C1A
C1B
Isolation
Interface
Line Diagnostics
PLL
DC-DC Controller
DC-DC Controller
C2A
PCLK
Control
C2B
Ring Detect
Off-Hook
CID
QB
QE
BOM
Hybrid and
dc
Termination
RX
DCT
VREG
IGND
TIP
FXO
RING
Si3217x
16
15
14
13
12
11
10
9
DCT2
IGND
DCT3
QB
QE2
SC
VREG2
RNG2
Si3291x
Patents pending
Rev. 1.4 3/13
Copyright © 2013 by Silicon Laboratories
Si3217x/3291x
Si3217x/3291x
2
Rev. 1.4
Si3217x/3291x
T
ABLE O F
C
ONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2. Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
5. FXS Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
5.1. DC Feed Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.2. Linefeed Operating States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.3. Line Voltage and Current Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.4. Power Monitoring and Power Fault Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.5. Thermal Overload Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.6. Loop Closure Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.7. Ground Key Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.8. Ringing Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.9. Polarity Reversal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.10. Two-Wire Impedance Synthesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.11. Transhybrid Balance Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.12. Tone Generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.13. DTMF Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.14. Pulse Metering (Si32170/1 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
5.15. DC-DC Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.16. Wideband Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.17. In-Circuit and Metallic Loop Testing (MLT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6. FXO Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
6.1. Isolation Barrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.2. Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.3. In-Circuit Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
6.4. Transmit/Receive Full-Scale Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
6.5. Line Voltage Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.6. Loop Current Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.7. Parallel Handset Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.8. DC Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.9. AC Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.10. Ring Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.11. Ring Validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
6.12. Ringer Impedance and Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.13. Pulse Dialing and Spark Quenching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.14. Receive Overload Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
6.15. On-Hook Line Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.16. Transhybrid Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7. System Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
7.1. SPI Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Rev. 1.4
3
Si3217x/3291x
7.2. PCM Interface and Companding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8. Pin Descriptions: Si3217x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
9. Pin Descriptions: Si3291x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
10. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
11. Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
12. Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
12.1. 42-Pin QFN/LGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
12.2. 42-Pin QFN/NBA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
13. PCB Land Pattern Si3217x QFN (LGA or NBA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
13.1. QFN PCB Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
13.2. QFN Solder Mask Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
13.3. QFN Stencil Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
13.4. QFN Card Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
14. Package Outline: 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
15. PCB Land Pattern Si3291x SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
16. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
16.1. Si3217x LGA Package Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
16.2. Si3217x LGA Package Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . 59
16.3. Si3217x NBA Package Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
16.4. Si3217x NBA Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
16.5. Si32919 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
16.6. Si3291x Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
4
Rev. 1.4
Si3217x/3291x
1. Electrical Specifications
Table 1. Recommended Operating Conditions
1
Parameter
Ambient Temperature
Silicon Junction Temperature,
QFN-42
Supply Voltage, Si3217x
Battery Voltage, Si32171/6/8
2
Battery Voltage, Si32170/7/9
2
Symbol
T
A
T
JHV
V
DDD
, V
DDA
,
V
DDHV
V
BAT
V
BAT
Test Condition
F-grade
G-grade
Linefeed Die
Min*
0
–40
—
3.13
–110
–136
Typ
25
25
—
3.3
–95
–130
Max*
70
85
145
3.47
–15
–15
Unit
°C
°C
°C
V
V
V
Notes:
1.
All minimum and maximum specifications apply across the recommended operating conditions. Typical values apply at
nominal supply voltages and an operating temperature of 25
°
C unless otherwise stated.
2.
Operation at minimum voltage dependent upon loop conditions and dc-dc converter configuration.
Table 2. Power Supply Characteristics for Si3217x
(V
DD
= 3.3 V, T
A
= 0 to 70 ºC)
Parameter
Supply Currents:
Reset
Supply Currents:
High Impedance, Open
Supply Currents:
Forward/Reverse, On-hook
Supply Currents:
Forward/Reverse, On-hook
Supply Currents:
Tip/Ring Open, On-hook
Symbol
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
I
DD
I
VBAT
Test Condition
V
T
and V
R
= Hi-Z , RST = 0
V
T
and V
R
= Hi-Z, FXO disabled
Min
—
—
—
—
Typ
9.7
0.0
13.2
0.47
11.2
0.44
27.2
1.4
12.5
0.4
26.3
Max
—
—
—
—
—
—
—
—
—
—
—
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
TR
= –48 V, FXO disabled, Auto-
matic Power Save Mode enabled
V
TR
= –48 V, FXO disabled, Auto-
matic Power Save Mode
disabled
V
T
or V
R
= –48 V,
V
R
or V
T
= Hi-Z,
FXO disabled, Automatic
Power Save Mode enabled
V
T
or V
R
= –48 V,
V
R
or V
T
= Hi-Z,
FXO disabled, Automatic
Power Save Mode disabled
—
—
—
—
—
—
—
Supply Currents:
Tip/Ring Open, On-hook
I
DD
I
VBAT
—
0.95
—
mA
Notes:
1.
I
LOOP
is the dc current in the subscriber loop during the off-hook state.
2.
I
DD
= I
DDD
+ I
DDA
+ I
DDC
.
3.
Refer to AN340 for power supply consumption of the recommended applications circuit, including dc-dc converter.
Rev. 1.4
5
京公网安备 11010802033920号
EEWORLD
