Features
•
Serial Peripheral Interface (SPI) Compatible
•
Supports SPI Modes 0 (0,0) and 3 (1,1)
•
Low Voltage and Standard Voltage Operation
– 5.0 (V
CC
= 4.5V to 5.5V)
– 2.7 (V
CC
= 2.7V to 5.5V)
– 1.8 (V
CC
= 1.8V to 3.6V)
3 MHz Clock Rate
64-Byte Page Mode and Byte Write Operation
Block Write Protection
– Protect 1/4, 1/2, or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for
Both Hardware and Software Data Protection
Self-Timed Write Cycle (5 ms Typical)
High Reliability
– Endurance: 100,000 Write Cycles
– Data Retention: >200 Years
– ESD Protection: >4000V
Automotive Grade and Extended Temperature Devices Available
8-Pin PDIP, 8-Pin EIAJ SOIC, 8-Pin and 16-Pin JEDEC SOIC, 14-Pin and 20-Pin TSSOP,
and 8-Pin Leadless Array Packages
•
•
•
•
•
•
SPI Serial
EEPROMs
128K (16,384 x 8)
256K (32,768 x 8)
•
•
Description
The AT25128/256 provides 131,072/262,144 bits of serial electrically erasable pro-
grammable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits
each. The device is optimized for use in many industrial and commercial applications
where low power and low voltage operation are essential. The devices are available in
(continued)
Pin Configurations
Pin Name
CS
SCK
SI
SO
GND
VCC
WP
HOLD
NC
DC
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Write Protect
Suspends Serial Input
No Connect
Don't Connect
CS
SO
NC
NC
NC
NC
WP
GND
CS
SO
NC
NC
NC
WP
GND
AT25128
AT25256
14-Lead TSSOP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
HOLD
NC
NC
NC
SCK
SI
20-Lead TSSOP*
16-Pin SOIC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
HOLD
NC
NC
NC
NC
SCK
SI
NC
CS
SO
SO
NC
NC
WP
GND
DC
NC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NC
VCC
HOLD
HOLD
NC
NC
SCK
SI
DC
NC
8-Pin PDIP
CS
SO
WP
GND
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
WP
GND
8-Pin SOIC
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
8-Pin Leadless Array
VCC
HOLD
SCK
SI
8
7
6
5
1
2
3
4
CS
SO
WP
GND
Rev. 0872E–08/98
Bottom View
*Note: Pins 3, 4 and 17, 18 are internally connected for 14-lead TSSOP socket compatibility.
1
space saving 8-pin PDIP (AT25128/256), 8-pin EIAJ SOIC
(AT25128/256), 8-pin and 16-pin JEDEC SOIC (AT25128),
14-pin TSSOP (AT25128), 20-pin TSSOP (AT25128/256),
and 8-pin Leadless Array (AT25128/256) packages. In
addition, the entire family is available in 5.0V (4.5V to
5.5V), 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) ver-
sions.
The AT25128/256 is enabled through the Chip Select pin
(CS) and accessed via a 3-wire interface consisting of
Serial Data Input (SI), Serial Data Output (SO), and Serial
Clock (SCK). All programming cycles are completely self-
timed, and no separate ERASE cycle is required before
WRITE.
BLOCK WRITE protection is enabled by programming the
status register with top ¼, top ½ or entire array of write pro-
tection. Separate program enable and program disable
instructions are provided for additional data protection.
Hardware data protection is provided via the WP pin to pro-
tect against inadvertent write attempts to the status regis-
ter. The HOLD pin may be used to suspend any serial
communication without resetting the serial sequence.
Absolute Maximum Ratings*
Operating Temperature .................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .................................... -1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
DC Output Current ........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions beyond those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.
Block Diagram
16384/32768 x 8
2
AT25128/256
AT25128/256
Pin Capacitance
Applicable over recommended operating range from T
A
= 25°C, f = 1.0 MHz, V
CC
= +5.0V (unless otherwise noted).
Test Conditions
C
OUT
C
IN
Note:
Output Capacitance (SO)
Input Capacitance (CS, SCK, SI, WP HOLD)
,
1. This parameter is characterized and is not 100% tested.
Max
8
6
Units
pF
pF
Conditions
V
OUT
= 0V
V
IN
= 0V
DC Characteristics
Applicable over recommended operating range from T
AI
= -40°C to +85°C, V
CC
= +1.8V to +5.5V,
T
AC
= 0°C to +70°C, V
CC
= +1.8V to +5.5V(unless otherwise noted).
Symbol
V
CC1
V
CC2
V
CC3
I
CC1
I
CC2
I
SB1
I
SB2
I
SB3
I
IL
I
OL
V
IL(1)
V
IH(1)
V
OL1
V
OH1
V
OL2
V
OH2
Note:
Parameter
Supply Voltage
Supply Voltage
Supply Voltage
Supply Current
Supply Current
Standby Current
Standby Current
Standby Current
Input Leakage
Output Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
4.5
≤
V
CC
≤
5.5V
1.8V≤ V
CC
≤3.6V
I
OL
= 3.0 mA
I
OH
= -1.6 mA
I
OL
= 0.15mA
I
OH
= -100µA
V
CC
- 0.2
v
CC
- 0.8
0.2
V
CC
= 5.0V at 1 MHz, SO = Open, Read
V
CC
= 5.0V at 2 MHz, SO = Open, Read, Write
V
CC
= 1.8V, CS = V
CC
V
CC
= 2.7V, CS = V
CC
V
CC
= 5.0V, CS = V
CC
V
IN
= 0V to V
CC
V
IN
= 0V to V
CC
, T
AC
= 0°C to 70°C
-3.0
-3.0
-1.0
V
CC
x 0.7
Test Condition
Min
1.8
2.7
4.5
2.0
3.0
0.1
0.2
2.0
Typ
Max
3.6
5.5
5.5
3.0
5.0
2.0
2.0
5.0
3.0
3.0
V
CC
x 0.3
V
CC
+ 0.5
0.4
Units
V
V
V
mA
mA
µA
µA
µA
µA
µA
V
V
V
V
V
V
1. V
IL
and V
IH
max are reference only and are not tested.
3
AC Characteristics
Applicable over recommended operating range from T
A
= -40°C to + 85°C, V
CC
= As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol
f
SCK
Parameter
SCK Clock Frequency
Voltage
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
150
200
800
150
200
800
250
250
1000
100
250
1000
150
250
1000
30
50
100
50
50
100
100
100
400
200
300
400
0
0
0
0
0
0
150
200
800
Min
0
0
0
Max
3.0
2.1
0.5
2
2
2
2
2
2
Units
MHz
t
RI
Input Rise Time
µs
t
FI
Input Fall Time
µs
t
WH
SCK High Time
ns
t
WL
SCK Low Time
ns
t
CS
CS High Time
ns
t
CSS
CS Setup Time
ns
t
CSH
CS Hold Time
ns
t
SU
Data In Setup Time
ns
t
H
Data In Hold Time
ns
t
HD
Hold Setup Time
ns
t
CD
Hold Hold Time
ns
t
V
Output Valid
ns
t
HO
Output Hold Time
ns
4
AT25128/256
AT25128/256
AC Characteristics (Continued)
Applicable over recommended operating range from T
A
= -40°C to + 85°C, V
CC
= As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol
t
LZ
Parameter
Hold to Output Low Z
Voltage
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
100K
Min
0
0
0
Max
100
200
300
100
200
300
200
250
1000
5
10
10
Units
ns
t
HZ
Hold to Output High Z
ns
t
DIS
Output Disable Time
ns
t
WC
Endurance
(1)
Note:
Write Cycle Time
ms
Write
Cycles
5.0V, 25°C, Page Mode
1. This parameter is characterized and is not 100% tested. Contact Atmel for further information.
5
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