Persistent and Password methods of Advanced Sector
Protection
Unlock Bypass program command to reduce programming
time
ACC input pin to reduce factory programming time
Data Polling bits indicate program and erase operation
completion
Hardware (WP#) protection of two outermost sectors in the
large bank
Ready/Busy (RY/BY#) output indicates data available to
system
Suspend and Resume commands for Program and Erase
Operation
Offered Packages
–
–
–
–
80-pin PQFP
80-ball Fortified BGA
Pb-free package option available
Known Good Die
VersatileI/O™ control (1.65 V to 3.6 V)
Programmable Burst Interface
– Linear for 2, 4, and 8 double word burst with or without wrap around
Secured Silicon Sector that can be either factory or customer
locked
20 year data retention (typical)
Cycling Endurance: 1 million write cycles per sector (typical)
Command set compatible with JEDEC (JC42.4) standard
Performance Characteristics
Read Access Times
Speed Option (MHz)
Max Asynch. Access Time, ns (t
ACC
)
Max Synch. Burst Access, ns (t
BACC
)
Min Initial Clock Delay (clock cycles)
Max CE# Access Time, ns (t
CE
)
Max OE# Access time, ns (t
OE
)
75
(32 Mb only)
48
7.5 (FBGA)
5
52
20
66
54
8
4
54
20
56
54
8
4
54
20
40
54
8
3
54
20
Typical Program and Erase Times
Double Word Programming
Sector Erase
18 µs
1.0 s
Current Consumption (Max values)
Continuous Burst Read @ 75 MHz
Program
Erase
Standby Mode
90 mA
50 mA
50 mA
60 µA
Publication Number
S29CD-J_CL-J_00
Revision
B
Amendment
1
Issue Date
September 27, 2006
This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qual-
ification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document
may be revised by subsequent versions or modifications due to changes in technical specifications.
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