AT27C400
Features
•
•
•
•
•
Fast Read Access Time - 70 ns
Word-wide or Byte-wide Configurable
4 Megabit Flash and Mask ROM Compatible
Low Power CMOS Operation
– 100
µA
Maximum Standby
– 50 mA Maximum Active at 5 MHz
Wide Selection of JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 40-Lead SOIC (SOP)
– 48-Lead TSOP (12 mm x 20 mm)
5V
±
10% Power Supply
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid
™
Programming Algorithm - 50
µs/word
(typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
•
•
•
•
•
•
4-Megabit
(256K x 16 or
512K x 8) OTP
EPROM
AT27C400
Preliminary
Description
The AT27C400 is a low-power, high-performance 4,194,304-bit one-time programma-
ble read only memory (OTP EPROM) organized as either 256K by 16 or 512K by 8
bits. It requires a single 5V power supply in normal read mode operation. Any word
can be accessed in less than 70 ns, eliminating the need for speed-reducing WAIT
states. The by-16 organization makes this part ideal for high-performance 16- and 32-
bit microprocessor systems.
PDIP Top View
SOIC (SOP)
Pin Configurations
Pin Name
A0 - A17
O0 - O15
O15/A-1
BYTE/VPP
CE
OE
NC
Function
Addresses
Outputs
Output/Address
Byte Mode/
Program Supply
Chip Enable
Output Enable
No Connect
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
O0
O8
O1
O9
O2
O10
O3
O11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE/VPP
GND
015/A-1
O7
O14
O6
O13
O5
O12
O4
VCC
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
O0
O8
O1
O9
O2
O10
O3
O11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE/VPP
GND
015/A-1
O7
O14
O6
O13
O5
O12
O4
VCC
TSOP
Type 1
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
NC
NC
NC
NC
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE/VPP
GND
015/A-1
I/O7
O14
O6
O13
O5
O12
O4
VCC
O11
O3
O10
O2
O9
O1
O8
O0
OE
GND
CE
A0
Note: Both GND pins must be
connected.
0844A-A–7/97
1
Description
(Continued)
The AT27C400 can be organized as either word-wide or
byte-wide. The organization is selected via the BYTE/V
PP
pin. When BYTE/V
PP
is asserted high (V
IH
), the word-wide
organization is selected and the O15/A-1 pin is used for
O15 data output. When BYTE/V
PP
is asserted low (V
IL
), the
byte-wide organization is selected and the O15/A-1 pin is
used for the address pin A-1. When the AT27C400 is logi-
cally regarded as x16 (word-wide), but read in the byte-
wide mode, then with A-1 = V
IL
the lower 8 bits of the 16-bit
word are selected and with A-1 = V
IH
the upper 8 bits of the
16-bit word are selected.
In read mode, the AT27C400 typically consumes 15 mA.
Standby mode supply current is typically less than 10
µA.
The AT27C400 is available in industry standard
JEDEC-approved one-time programmable (OTP) PDIP,
SOIC (SOP), and TSOP packages. The device features
two-line control (CE, OE) to eliminate bus contention in
high-speed systems.
With high density 256K word or 512K byte storage capabil-
ity, the AT27C400 allows firmware to be stored reliably and
to be accessed by the system without the delays of mass
storage media.
Atmel’s AT27C400 has additional features that ensure high
quality and efficient production use. The Rapid
™
Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 50
µs/word.
The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1
µF
high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
CC
and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7
µF
bulk electrolytic capacitor should
be utilized, again connected between the V
CC
and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
2
AT27C400
AT27C400
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias ......................-55°C to +125°C
Storage Temperature............................-65°C to +150°C
Voltage on Any Pin with
Respect to Ground ..............................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ...........................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground ............................-2.0V to +14.0V
(1)
Integrated UV Erase Dose...................7258 W •sec/cm
2
*NOTICE:
Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions beyond those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.
Minimum voltage is -0.6V dc which undershoot to -
2.0V for pulses of less than 20 ns. Maximum output
pin voltage is V
CC
+ 0.75V dc which may overshoot to
+7.0V for pulses of less than 20 ns.
Note:
1.
Operating Modes
Outputs
Mode/Pin
Read Word-wide
Read Byte-wide Upper
Read Byte-wide Lower
Output Disable
Standby
Rapid Program
(2)
PGM Verify
PGM Inhibit
Product Identification
(4)
CE
V
IL
V
IL
V
IL
X
(1)
V
IH
V
IL
X
V
IH
V
IL
OE
V
IL
V
IL
V
IL
V
IH
X
(1)
V
IH
V
IL
V
IH
V
IL
Ai
X
(1)
X
(1)
X
(1)
X
(1)
X
(1)
Ai
Ai
X
(1)
A9 = V
H(3)
A0 = V
IH
or V
IL
A1 - A17 = V
IL
BYTE/V
PP
V
IH
V
IL
V
IL
X
X
(5)
V
PP
V
PP
V
PP
V
IH
O
0
- O
7
D
OUT
D
OUT
D
OUT
O
8
- O
14
D
OUT
High Z
High Z
High Z
High Z
D
IN
D
OUT
High Z
Identificatio
n
Code
O
15
/A-1
D
OUT
V
IH
V
IL
Notes:
1.
2.
3.
4.
5.
X can be V
IL
or V
IH
.
Refer to the programming characteristics tables in this data sheet.
V
H
= 12.0 ± 0.5V.
Two identifier words may be selected. All inputs are held low (V
IL
), except A9, which is set to V
H
, and A0, which is toggled
low (V
IL
) to select the Manufacturer’s Identification word and high (V
IH
) to select the Device Code word.
Standby V
CC
current (ISB) is specified with V
PP
= V
CC
. V
CC
> V
PP
will cause a slight increase in ISB.
3
DC and AC Operating Conditions for Read Operation
AT27C400
-70
Operating
Temperature
(Case)
V
CC
Power Supply
Com.
Ind.
0°C - 70°C
-40°C - 85°C
5V
±
10%
-90
0°C - 70°C
-40°C - 85°C
5V
±
10%
-12
0°C - 70°C
-40°C - 85°C
5V
±
10%
-15
0°C - 70°C
-40°C - 85°C
5V
±
10%
DC and Operating Characteristics for Read Operation
Symbol
I
LI
I
LO
I
PP1(2)
Parameter
Input Load Current
Output Leakage Current
V
PP(1)
Read/Standby Current
V
CC(1)
Standby Current
Condition
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
PP
= V
CC
I
SB1
(CMOS)
CE = V
CC
±
0.3V
I
SB2
(TTL)
CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA,
CE = V
IL
-0.6
2.0
I
OL
= 2.1 mA
I
OH
= -400
µA
2.4
Min
Max
±
1
±
5
10
100
1
40
0.8
V
CC
+ 0.5
0.4
Units
µA
µA
µA
µA
mA
mA
V
V
V
V
I
SB
V
CC
Active Current
V
IL
V
IH
V
OL
V
OH
Notes:
1.
2.
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
V
CC
must be applied simultaneously or beofre V
PP
, and removed simultaneously or after V
PP
.
V
PP
may be connected directly to V
CC
, except during programming. The supply current would then be the sum of I
CC
and
I
PP
.
AC Characteristics for Read Operation
AT27C400
-70
Symbol
t
ACC(2)
t
CE(2)
t
OE(2)(3)
t
DF(4)(5)
t
OH(4)
t
ST
t
STD
Notes:
Parameter
Address to
Output Delay
CE to Output Delay
OE to Output Delay
OE or CE High to Output Float,
whichever occurred first
Output Hold from Address,
CE or OE, whichever occurred first
BYTE High to Output Valid
BYTE Low to Output Transition
2, 3, 4, 5. See the AC Waveforms for Read Operation diagram.
5
70
40
Condition
CE = OE
= V
IL
OE = V
IL
CE = V
IL
Min
Max
70
70
30
20
5
90
40
Min
-90
Max
90
90
35
20
5
120
50
Min
-12
Max
120
120
40
30
5
150
60
Min
-15
Max
150
150
50
35
Units
ns
ns
ns
ns
ns
ns
ns
= Advance Information
4
AT27C400
AT27C400
Byte-Wide Read Mode AC Waveforms
Note:
BYTE/V
PP
= V
IL
Word-Wide Read Mode AC Waveforms
Note:
BYTE/V
PP
= V
IH
BYTE Transition AC Waveforms
Notes:
1.
2.
3.
4.
5.
Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
OE maybe delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
.
OE maybe delayed up to t
ACC
- t
OE
after the address is valid without impact on t
ACC
.
This parameter is only sampled and is not 100% tested.
Output float is defined as the point when data is no longer driven.
5
Embedded System
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