AT27C4096
Features
•
Fast Read Access Time - 55 ns
•
Low Power CMOS Operation
•
– 100
µA
Maximum Standby
– 40 mA Maximum Active at 5 MHz
JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead TSOP (10 mm x 14 mm)
Direct Upgrade from 512K bit, 1M bit, and 2M bit
(AT27C516, AT27C1024, and AT27C2048) EPROMs
5V
±
10% Power Supply
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid
™
Programming Algorithm - 50
µs/word
(typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
•
•
•
•
•
•
•
4-Megabit
(256K x 16)
OTP EPROM
AT27C4096
Description
The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time program-
mable read only memory (OTP EPROM) organized 256K by 16 bits. It requires a sin-
gle 5V power supply in normal read mode operation. Any word can be accessed in
less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16
organization makes this part ideal for high-performance 16- and 32-bit microprocessor
systems.
(continued)
Pin Configurations
Pin Name
A0 - A17
O0 - O15
CE
OE
NC
Note:
PDIP Top View
Function
Addresses
Outputs
Chip Enable
Output Enable
No Connect
Both GND pins must be
connected.
PLCC Top View
TSOP Top View
Type 1
0311E-A–06/97
1
Description
In read mode, the AT27C4096 typically consumes 15 mA.
Standby mode supply current is typically less than 10
µA.
The AT27C4 096 is a va ila ble i n i ndus tr y st anda rd
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC, and TSOP packages. The device features
two-line control (CE, OE) to eliminate bus contention in
high-speed systems.
With high density 256K word storage capability, the
AT27C4096 allows firmware to be stored reliably and to be
accessed by the system without the delays of mass storage
media.
Atmel’s AT27C4096 has additional features that ensure
high quality and efficient production use. The Rapid
™
Pro-
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program-
ming time is typically only 50
µs/word.
The Integrated Prod-
uct Identification Code electronically identifies the device
and manufacturer. This feature is used by industry stan-
dard programming equipment to select the proper program-
ming algorithms and voltages.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1
µF
high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
CC
and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7
µF
bulk electrolytic capacitor should
be utilized, again connected between the V
CC
and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
2
AT27C4096
AT27C4096
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias ......................-55°C to +125°C
Storage Temperature............................-65°C to +150°C
Voltage on Any Pin with
Respect to Ground ...............................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ............................-2.0V to +14.0V
(1)
Note:
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
V
PP
Supply Voltage with
Respect to Ground .............................-2.0V to +14.0V
(1)
Maximum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum out-
put pin voltage is V
CC
+ 0.75V dc which may over-
shoot to +7.0V for pulses of less than 20 ns.
Operating Modes
Mode/Pin
Read
Output Disable
Standby
Rapid Program
(2)
PGM Verify
PGM Inhibit
Product Identification
(4)
Notes:
1. X can be V
IL
or V
IH
.
2. Refer to the Programming characteristics.
3. V
H
= 12.0
±
0.5V.
4. Two identifier words may be selected. All Ai inputs are held low (V
IL
), except A9, which is set to V
H
, and A0, which is toggled
low (V
IL
) to select the Manufacturer’s Identification word and high (V
IH
) to select the Device Code word.
5. Standby V
CC
current (I
SB
) is specified with V
PP
= V
CC
. V
CC
> V
PP
will cause a slight increase in I
SB
.
CE
V
IL
X
V
IH
V
IL
V
IH
V
IH
V
IL
OE
V
IL
V
IH
X
V
IH
V
IL
V
IH
V
IL
Ai
Ai
X
X
Ai
Ai
X
A9 = V
H(3)
A0 = V
IH
or V
IL
A1 - A17 = V
IL
V
PP
X
(1)
X
X
(5)
V
PP
V
PP
V
PP
V
CC
Outputs
D
OUT
High Z
High Z
D
IN
D
OUT
High Z
Identification Code
3
DC and AC Operating Conditions for Read Operation
AT27C4096
-55
Operating Temperature
(Case)
V
CC
Power Supply
Com.
Ind.
0°C - 70°C
-40°C - 85°C
5V
±
10%
-70
0°C - 70°C
-40°C - 85°C
5V
±
10%
-90
0°C - 70°C
-40°C - 85°C
5V
±
10%
-12
0°C - 70°C
-40°C - 85°C
5V
±
10%
-15
0°C - 70°C
-40°C - 85°C
5V
±
10%
DC and Operating Characteristics for Read Operation
Symbol
I
LI
I
LO
I
PP1(2)
Parameter
Input Load Current
Output Leakage Current
V
PP(1)
Read/Standby Current
Condition
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
PP
= V
CC
I
SB1
(CMOS)
CE = V
CC
± 0.3V
I
SB2
(TTL)
CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA,
CE = V
IL
-0.6
2.0
I
OL
= 2.1 mA
I
OH
= -400
µA
2.4
Min
Max
±
1
±
5
10
100
1
40
0.8
V
CC
+ 0.5
0.4
Units
µA
µA
µA
µA
mA
mA
V
V
V
V
I
SB
V
CC
(1)
Standby Current
I
CC
V
IL
V
IH
V
OL
V
OH
Notes:
V
CC
Active Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. V
PP
may be connected directly to V
CC
, except during programming. The supply current would then be the sum of I
CC
and
I
PP
.
AC Characteristics for Read Operation
AT27C4096
-55
Symbol
t
ACC(3)
t
CE(2)
t
OE(2)(3)
t
DF(4)(5)
Parameter
Address to
Output Delay
CE to Output Delay
OE to Output Delay
OE or CE High to
Output Float,
whichever occurred
first
Output Hold from
Address, CE or OE,
whichever occurred
first
7
Condition
CE = OE
= V
IL
OE = V
IL
CE = V
IL
Min
Max
55
55
20
20
Min
-70
Max
70
70
30
20
Min
-90
Max
90
90
35
20
Min
-12
Max
120
120
40
30
Min
-15
Max
150
150
50
35
Units
ns
ns
ns
ns
t
OH(4)
Note:
7
0
0
0
ns
2, 3, 4, 5. See the AC Waveforms for Read Operation diagram.
4
AT27C4096
AT27C4096
AC Waveforms for Read Operation
(1)
Notes:
1.
2.
3.
4.
5.
Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
.
OE may be delayed up to t
ACC
- t
OE
after the address is valid without impact on t
ACC
.
This parameter is only sampled and is not 100% tested.
Output float is defined as the point when data is no longer driven.
Input Test Waveforms and Measurement Levels
For -55 devices only:
Output Test Load
t
R
, t
F
< 5 ns (10% to 90%)
For -70, -90, -12 and -15 devices:
Note:
CL = 100 pF including jig
capacitance, except for
the -45 and -55 devices,
where CL = 30 pF.
t
R
, t
F
< 20 ns (10% to 90%)
Pin Capacitance
(f = 1 MHz T = 25°C)
(1)
Typ
C
IN
C
OUT
Note:
Max
10
12
Units
pF
pF
Conditions
V
IN
= 0V
V
OUT
= 0V
4
8
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
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