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IDT74FCT543AL

Description
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC28, LCC-28
Categorylogic    logic   
File Size72KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT74FCT543AL Overview

Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC28, LCC-28

IDT74FCT543AL Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQLCC
package instructionQCCN, LCC28,.45SQ
Contacts28
Reach Compliance Code_compli
Other featuresMASTER CONTROL FOR LATCH AND OUTPUT ENABLES IN EACH DIRECTION
Control typeINDEPENDENT CONTROL
Counting directionBIDIRECTIONAL
seriesFCT
JESD-30 codeS-CQCC-N28
JESD-609 codee0
length11.4554 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
MaximumI(ol)0.064 A
Number of digits8
Number of functions1
Number of ports2
Number of terminals28
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Output polarityTRUE
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Encapsulate equivalent codeLCC28,.45SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)225
power supply5 V
Prop。Delay @ Nom-Su6.5 ns
propagation delay (tpd)8 ns
Certification statusNot Qualified
Maximum seat height2.54 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
translateN/A
width11.4554 mm
®
FAST CMOS
OCTAL LATCHED
TRANSCEIVER
DESCRIPTION:
IDT54/74FCT543
IDT54/74FCT543A
IDT54/74FCT543C
Integrated Device Technology, Inc.
FEATURES:
IDT54/74FCT543 equivalent to FAST™ speed
IDT54/74FCT543A 25% faster than FAST
IDT54/74FCT543C 40% faster than FAST
Equivalent to FAST output drive over full temperature
and voltage supply extremes
I
OL
= 64mA (commercial), 48mA (military)
Separate controls for data flow in each direction
Back-to-back latches for storage
CMOS power levels (1mW typ. static)
Substantially lower input current levels than FAST
(5µA max.)
TTL input and output level compatible
CMOS output level compatible
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
The IDT54/74FCT543/A/C is a non-inverting octal trans-
ceiver built using an advanced dual metal CMOS technology.
These devices contain two sets of eight D-type latches with
separate input and output controls for each set. For data flow
from A to B, for example, the A-to-B Enable (
CEAB
) input must
be LOW in order to enter data from A
0
–A
7
or to take data from
B
0
–B
7
, as indicated in the Function Table. With
CEAB
LOW,
a LOW signal on the A-to-B Latch Enable (
LEAB
) input makes
the A-to-B latches transparent; a subsequent LOW-to-HIGH
transition of the
LEAB
signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With
CEAB
and
OEAB
both LOW, the 3-state B output buffers
are active and reflect the data present at the output of the A
latches. Control of data from B to A is similar, but uses the
CEBA
,
LEBA
and
OEBA
inputs.
FUNCTIONAL BLOCK DIAGRAMS
DETAIL A
D
LE
A
0
Q
D
LE
Q
B
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
DETAIL A x 7
B
1
B
2
B
3
B
4
B
5
B
6
B
7
OEBA
OEAB
CEBA
LEBA
CEAB
LEAB
2614 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a registered trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992
Integrated Device Technology, Inc.
MAY 1992
DSC-4602/3
7.17
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