DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
μ
PC451GR-9LG,
μ
PC324GR-9LG
SINGLE POWER SUPPLY QUAD OPERATIONAL AMPLIFIERS
<R>
DESCRIPTION
The
μ
PC451GR-9LG,
μ
PC324GR-9LG are quad operational amplifiers which are designed to operate for a single
power supply. It includes features of low-voltage operation, a common-mode input voltage that range from V
−
(GND)
level, an output from a V
−
(GND) level that is determined by the output stage of class C push-pull circuit and a 50
μ
A(TYP.) constant current, and a low current consumption.
In addition, this can operate at both positive and negative power supply and it can be extensively used in various
amplifier circuits.
The
μ
PC451GR-9LG which expands temperature type is suited for wide operating ambient temperature use, and
μ
PC324GR-9LG is used for general purposes.
A DC parameter selection that is compatible to operational amplifiers is also available.
μ
PC1251GR-9LG,
μ
PC1251MP-KAA,
μ
PC358GR-9LG which are dual types with the same circuit configuration are
also available as series of operational amplifiers.
<R>
FEATURES
• Input Offset Voltage
±2
mV (TYP.)
• Internal frequency compensation
• Input Offset Current
±5
nA (TYP.)
• Output short-circuit protection
• Large Signal Voltage Gain
100000 (TYP.)
• Small Package (The mounting area is reduced to half compared to the conventional 14-pin plastic SOP (1.27 mm
pitch))
<R>
ORDERING INFORMATION
Part Number
Selected Grade
Note
Package
14-pin plastic TSSOP (5.72 mm(225))
14-pin plastic TSSOP (5.72 mm(225))
14-pin plastic TSSOP (5.72 mm(225))
14-pin plastic TSSOP (5.72 mm(225))
14-pin plastic TSSOP(5.72 mm(225))
14-pin plastic TSSOP(5.72 mm(225))
14-pin plastic TSSOP(5.72 mm(225))
14-pin plastic TSSOP(5.72 mm(225))
Package Type
•
16 mm wide embossed taping
•
Pin 1 on draw-out side
•
16 mm wide embossed taping
•
Pin 1 at take-up side
•
16 mm wide embossed taping
•
Pin 1 on draw-out side
•
16 mm wide embossed taping
•
Pin 1 at take-up side
•
16 mm wide embossed taping
•
Pin 1 on draw-out side
•
16 mm wide embossed taping
•
Pin 1 at take-up side
•
16 mm wide embossed taping
•
Pin 1 on draw-out side
•
16 mm wide embossed taping
•
Pin 1 at take-up side
μ
PC451GR-9LG-E1-A
μ
PC451GR-9LG-E2-A
Standard
Standard
DC
parameter selection
DC
parameter selection
Standard
Standard
DC
parameter selection
DC
parameter selection
Note
μ
PC451GR(5)-9LG-E1-A
μ
PC451GR(5)-9LG-E2-A
μ
PC324GR-9LG-E1-A
μ
PC324GR-9LG-E2-A
Note
Note
Note
Note
μ
PC324GR(5)-9LG-E1-A
μ
PC324GR(5)-9LG-E2-A
Note
Note
Note
Pb-free (This product does not contain Pb in the external electrode and other parts.)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G17927EJ3V0DS00 (3rd edition)
Date Published December 2007 NS
Printed in Japan
2006, 2007
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
μ
PC451GR-9LG,
μ
PC324GR-9LG
EQUIVALENT CIRCUIT (1/4 Circuit)
V
+
<R>
PIN CONFIGURATION (Marking side)
100
μ
A
6
μ
A
Q
2
Q
1
Q
3
Q
4
6
μ
A
Q
5
C
C
Q
7
R
SC
OUT
Q
6
OUT1
I
I1
I
N1
V
+
I
N2
I
I2
OUT2
1
2
3
4
5
6
7
−+
2
+−
3
1
−+
4
+−
14
13
12
11
10
9
8
OUT4
I
I4
I
N4
V
−
I
N3
I
I3
OUT3
I
I
+
I
N
−
Q
10
Q
8
Q
9
Q
11
Q
12
Q
13
50
μ
A
V
−
<R>
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Parameter
+
−
Note1
Symbol
+
−
μ
PC451GR-9LG,
μ
PC451GR(5)-9LG
−0.3
to
+32
±32
−
−
μ
PC324GR-9LG,
μ
PC324GR(5)-9LG
Unit
Voltage between V and V
Differential Input Voltage
Input Voltage
Note2
V
−
V
V
ID
V
I
V
V
V
V
mW
s
−40
to
+85
−55
to
+125
+
V
−
0.3 to V
+
32
V
−
0.3 to V
+
0.3
550
Indefinite
−40
to
+125
−55
to
+150
−
+
Output applied Voltage
Total Power Dissipation
Note3
Note4
Note5
V
O
P
T
t
S
T
A
T
stg
Output Short Circuit Duration
Operating Ambient Temperature
Storage Temperature
°C
°C
Note1.
Note that reverse connections of the power supply may damage ICs.
2.
The input voltage is allowed to input without damage or destruction independent of the magnitude of V . Either
input signal is not allowed to go negative by more than 0.3 V. In addition, the input voltage that operates
normally as an operational amplifier is within the Common Mode Input Voltage range of an electrical
characteristic.
3.
A range where input voltage can be applied to an output pin externally with no deterioration or damage to the
feature (characteristic). The input voltage can be applied regardless of the electric supply voltage. This
specification which includes the transition state such as electric power ON/OFF must be kept.
4.
This is the value of when the glass epoxy substrate (size: 100 mm x 100 mm, thickness: 1 mm, 15% of the
substrate area where only one side is copper foiled is filling wired) is mounted.
Note that restrictions will be made to the following conditions for each product, and the derating ratio
depending on the operating ambient temperature.
μ
PC451GR-9LG: Derate at
−7.0
mW/°C when T
A
> 71°C.
(Junction
−
ambient thermal resistance R
th(J-A)
= 144°C/W)
μ
PC324GR-9LG: Derate at
−7.0
mW/°C when T
A
> 46°C.
(Junction
−
ambient thermal resistance R
th(J-A)
= 144°C/W)
5.
V
+
≤ +15
V, 1 arbitrary channel only. Pay careful attention to the total power dissipation not to exceed the
absolute maximum ratings,
Note 4.
2
Data Sheet G17927EJ3V0DS
μ
PC451GR-9LG,
μ
PC324GR-9LG
RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage (Split)
Power Supply Voltage (V = GND)
−
Symbol
V
V
±
+
MIN.
±1.5
+3
TYP.
MAX.
±15
+30
Unit
V
V
<R>
ELECTRICAL CHARACTERISTICS
μ
PC451GR-9LG,
μ
PC324GR-9LG (T
A
= 25°C, V
+
=
+5
V, V
−
= GND)
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Note1
Symbol
V
IO
I
IO
I
B
A
V
I
CC
CMR
SVR
V
O
V
ICM
I
O SOURCE
I
O SINK1
I
O SINK2
R
L
≥
2 kΩ
R
S
= 0
Ω
Conditions
MIN.
TYP.
±2
±5
15
MAX.
±7
±50
250
Unit
mV
nA
nA
Large Signal Voltage Gain
Circuit Current
Note2
25000
100000
1.2
2.0
mA
dB
dB
V
−
1.5
V
−
1.5
40
20
50
120
+
+
R
L
=
∞,
I
O
= 0 A
65
65
R
L
= 2 kΩ (Connect to GND)
0
0
V
IN (+)
=
+1
V, V
IN (−)
= 0 V
V
IN (−)
=
+1
V, V
IN (+)
= 0 V
V
IN (−)
=
+1
V, V
IN (+)
= 0 V, V
O
= 200 mV
f = 1 to 20 kHz
20
10
12
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Output Voltage Swing
Common Mode lnput Voltage Range
Output Source Current
Output Sink Current
85
100
V
V
mA
mA
μ
A
dB
Channel Separation
μ
PC451GR(5)-9LG,
μ
PC324GR(5)-9LG (T
A
= 25°C, V
+
=
+5
V, V
−
= GND)
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Note1
Symbol
V
IO
I
IO
I
B
A
V
I
CC
CMR
SVR
V
O
V
ICM
I
O SOURCE
I
O SINK1
I
O SINK2
R
L
≥
2 kΩ
R
S
= 0
Ω
Conditions
MIN.
TYP.
±2
±5
15
MAX.
±3
±50
60
Unit
mV
nA
nA
Large Signal Voltage Gain
Circuit Current
Note2
50000
100000
1.2
1.5
mA
dB
dB
V
−
1.5
V
−
1.4
40
20
50
120
70
+
+
R
L
=
∞,
I
O
= 0 A
65
65
R
L
= 2 kΩ (Connect to GND)
0
0
V
IN (+)
=
+1
V, V
IN (−)
= 0 V
V
IN (−)
=
+1
V, V
IN (+)
= 0 V
V
IN (−)
=
+1
V, V
IN (+)
= 0 V, V
O
= 200 mV
f = 1 to 20 kHz
30
15
30
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Output Voltage Swing
Common Mode lnput Voltage Range
Output Source Current
Output Sink Current
85
100
V
V
mA
mA
μ
A
dB
Channel Separation
Notes1.
The input bias current flows in the direction where the IC flows out because the first stage is configured with a
PNP transistor.
2.
This is a current that flows in the internal circuit. This current will flow irrespective of the channel used.
Data Sheet G17927EJ3V0DS
3
μ
PC451GR-9LG,
μ
PC324GR-9LG
<R>
TYPICAL PERFORMANCE CHARACTERISTICS (T
A
= 25°C, TYP.) (Reference value)
P
T
vs. T
A
I
CC
vs. V
+
4
R
L
=
∞
I
O
= 0 A
1000
P
T
- Total Power Dissipation - mW
800
600
I
CC
- Supply Current - mA
With 100 mm x 100 mm, thickness 1 mm
glass epoxy substrate
(refer to "ABSOLUTE
MAXIMUM
RATINGS Note 4"
)
3.5
3
2.5
2
1.5
1
0.5
0
μ
P
400
200
0
0
20
40
C3
2
μ
P
4G
R-
9
T
A
= 25°C
125°C
C4
51
GR
LG
-9
LG
−40°C
60
80
100
120
140
0
10
20
30
40
T
A
- Operating Ambient Temperature -
°C
V
+
- Power Supply Voltage - V (V
−
= GND)
V
IO
vs. V
+
2
V
IO
- Input Offset Voltage - mV
V
IO
- Input Offset Voltage - mV
3
2
1
0
-1
-2
-3
0
10
20
30
40
-50
0
V
IO
vs. T
A
1
0
-1
V
+
=
+5
V, V
−
= GND
each 5 samples data
50
100
150
-2
V
+
- Power Supply Voltage - V (V
−
= GND)
T
A
- Operating Ambient Temperature -
°C
I
B
vs. V
+
30
I
B
- Input Bias Current - nA
30
I
B
vs. T
A
20
I
B
- Input Bias Current - nA
20
10
10
V
+
=
+15
V
V
−
= GND
0
-50
0
50
100
150
0
0
10
20
30
40
V
+
- Power Supply Voltage - V (V
−
= GND)
T
A
- Operating Ambient Temperature -
°C
4
Data Sheet G17927EJ3V0DS
μ
PC451GR-9LG,
μ
PC324GR-9LG
I
O SHORT
vs. T
A
A
V
vs. V
+
70
I
O SHORT
- Output Short Current - mA
−
+
I
O SHORT
A
V
- Voltage Gain - dB
160
R
L
= 20 kΩ
120
2 kΩ
80
60
50
40
40
30
-20
0
20
40
60
80
0
0
10
20
30
40
V
+
- Power Supply Voltage - V (V
−
= GND)
T
A
- Operating Ambient Temperature -
°C
A
V
,
φ
vs. f
140
A
V
- Voltage Gain - dB,
φ
- Phase Margin - deg.
120
100
V
±
=
±15
V
φ
A
V
±15
V
80
60
40
20
0
0.1
1
±7.5
V
±2.5
V
±7.5
V
±2.5
V
10
100
1k
10 k
100 k
1M
f - Frequency - Hz
V
O
vs. f
CMR vs. f
CMR - Common Mode Rejection Ratio - dB
20
V
O
- Output Voltage Signal - V
p-p
100 kΩ
1 kΩ
+15
V
−
V
O
2 kΩ
120
100
80
60
40
20
0
100
1k
10 k
100 k
1M
15
+7
V
+
V
IN
10
5
0
1k
3 5 10 k
30 50 100 k 3005001 M
f - Frequency - Hz
f - Frequency - Hz
Data Sheet G17927EJ3V0DS
5
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