SEMICONDUCTOR
RoHS
41T Series
RoHS
TRIACs, 40A
Sunbberless
FEATURES
High current triac
Low thermal resistance with clip bonding
Low thermal resistance insulation ceramic
for insulated TO-3P package
High commutation capability
41T series are
UL
certified (File ref: E320098)
Packages are RoHS compliant
A2
A1 A2
G
A1 A2 G
APPLICATIONS
The snubberless concept offer suppression of RC
network and it is suitable for applications such as
on/off function in static relays, heating regulation,
induction motor starting circuits, phase control
operation in light dimmers, motor speed controllers,
and silmilar.
Due to their clip assembly techinque, they provide
a superior performance in surge current handling
capabilities.
By using an internal ceramic pad, the 41T series
provides voltage insulated tab (rated at 2500V
RMS
)
complying with UL standards.
TO-3P
(non-Insulated)
(41TxxB)
TO-3P
(Insulated)
(41TxxBI)
MAIN FEATURES
SYMBOL
I
T(RMS)
V
DRM
/V
RRM
I
GT(Q1)
VALUE
40
600 to 1600
35 to 50
UNIT
A
V
mA
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RMS on-state current
(full
sine wave)
Non repetitive surge peak on-state
current
(full
cycle, T
j
initial = 25°C)
I
2
t Value for fusing
Critical rate of rise of on-state current
I
G
= 2xl
GT
, t
r
≤100ns
Peak gate current
Peak gate power dissipation (tp = 20µs)
Average gate power dissipation
Storage temperature range
Operating junction temperature range
SYMBOL
TO-3P
I
T(RMS)
TO-3P insulated
F =50 Hz
F =60 Hz
I t
dI/dt
I
GM
P
GM
P
G(AV)
T
stg
T
j
2
TEST CONDITIONS
T
c
= 95ºC
VALUE
40
T
c
= 80ºC
t = 20 ms
t = 16.7 ms
400
420
800
T
j
=125ºC
T
j
=125ºC
50
4
10
UNIT
A
I
TSM
A
A
2
s
A/µs
A
W
t p = 10 ms
F =100 Hz
T
p
=20 µs
T
j
=125ºC
T
j
=125ºC
1
- 40
to
+ 150
ºC
- 40
to
+ 125
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Page 1 of 5
SEMICONDUCTOR
RoHS
41T Series
RoHS
ELECTRICAL CHARACTERISTICS
(T
J
= 25 ºC unless otherwise specified)
SNUBBERLESS and Logic level (3 quadrants)
41Txxxx
SYMBOL
I
GT(1)
V
GT
V
GD
I
H(2)
I
L
dV/dt
(2)
(dI/dt)c
(2)
V
D
= V
DRM
, R
L
= 3.3KΩ
T
j
= 125°C
I
T
= 500 mA
I
-
III
I
G
= 1.2 I
GT
II
V
D
= 67% V
DRM
, gate open ,T
j
= 125°C
Without snubber, T
j
= 125°C
MAX.
TEST CONDITIONS
QUADRANT
I
-
II
-
III
V
D
= 12 V, R
L
= 30Ω
I
-
II
-
III
I
-
II
-
III
MIN.
MAX.
MAX.
1.3
0.2
60
80
mA
100
1000
MIN.
20
A/ms
V/µs
V
V
mA
Unit
BW
50
mA
STATIC CHARACTERISTICS
SYMBOL
V
TM(2)
V
t0
(2)
R
d
(2)
I
DRM
I
RRM
I
TM
= 60 A, t
P
= 380 µs
Threshold voltage
Dynamic resistance
V
D
=
V
DRM
V
R
=
V
RRM
TEST CONDITIONS
T
j
= 25°C
T
j
= 125°C
T
j
= 125°C
T
j
= 25°C
MAX.
T
j
= 125°C
5
MAX.
MAX.
MAX.
VALUE
1.55
0.85
10
10
UNIT
V
V
mΩ
µA
mA
Note
1:
Minimum l
GT
is guaranted at
5%
of l
GT
max.
Note
2:
For both polarities of A2 referenced to A1.
THERMAL RESISTANCE
SYMBOL
R
th(j-c)
R
th(j-a)
Junction to case
(AC)
Junction to ambient
TO-3P
TO-3P Insulated
TO-3P, TO-3P Insulated
VALUE
0.6
0.9
50
UNIT
°C/W
S
=
Copper surface under tab.
PRODUCT SELECTOR
VOLTAGE
(x
x)
PART NUMBER
600
V
41TxxB-BW/ 41TxxBl-BW
BI:
Insulated TO-3P package
V
800
V
V
1000
V
V
1200
V
V
1600
V
V
50
mA
Snubberless
TO-3P
SENSITIVITY
TYPE
PACKAGE
ORDERING INFORMATION
ORDERING TYPE
41TxxB-yy
41TxxBI-yy
Note:
xx
=
voltage, yy
=
sensitivity
MARKING
41TxxB-yy
41TxxBI-yy
PACKAGE
TO-3P
TO-3P
insulated
WEIGHT
4.3g
4.8g
BASE Q,TY
30
30
DELIVERY MODE
Tube
Tube
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Page 2 of 5
SEMICONDUCTOR
RoHS
41T Series
RoHS
ORDERING INFORMATION SCHEME
41 T 06
Current
41 = 40A
B - BW
Triac series
Voltage
06 = 600V
08 = 800V
10 = 1000V
12 = 1200V
16 = 1600V
Package type
B
=
TO-3P (non-insulated)
BI = TO-3P (
insulated
)
I
GT
Sensitivity
BW
= 50mA
Snubberless
Fig.1 Maximum power dissipation versus on-state rms
current
(full
cycle)
P
(W)
50
40
30
20
180°
Fig.2 On-state rms current versus case temperature
(full
cycle)
I
T(RMS)
(A)
45
40
35
30
25
20
TO-3P(insulated)
α=180°
TO-3P
α
15
10
5
0
10
I
T(RMS)
(A)
0
0
5
10
15
20
25
30
α
T
C
(°C)
0
25
50
75
100
125
35
40
Fig.3 Relative variation of thermal impedance
versus pulse duration.
K=[Z
th
/R
th
]
1E+00
Fig.4 On-state characteristics (maximum values).
I
TM
(A)
400
T
j
=T
j
max
Z
th(j-c)
100
1E-01
TO-3P
TO-3P(insulated)
1E-02
10
T
j
=25°C
T
j
max.
V
to
= 0.85
V
R
d
= 10
mΩ
tp(s)
1E-03
1E-03
1E-02
1E-01
1E+00
1E+01
1E+02
1E+0.3
1
0.5
1.0
1.5
2.0
V
TM
(V)
2.5
3.0
3.5
4.0
4.5
5.0
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Page 3 of 5
SEMICONDUCTOR
RoHS
41T Series
RoHS
Fig.5 Surge peak on-state current versus number
of cycles.
Fig.6 Non-repetitive surge peak on-state current
for a sinusoidal pulse and corresponding
value of l
2
t.
I
TSM
(A),l
2
t(A
2
s)
10000
I
TSM
T
j
initial =25°C
Pulse width tp <10 ms
I
TSM
(A)
450
400
350
300
250
200
150
100
50
0
1
10
100
1000
Repetitive
T
c
=70°C
Non repetitive
T
j
initial=25°C
t=20ms
One cycle
1000
dl/dt limitation
50A/µs
I
2
t
Number of cycles
t
p
(ms)
100
0.01
0.10
1.00
10.00
Fig.7 Relative variation of gate trigger, holding
and latching current versus junction
temperature.
l
GT
,
l
H
,
l
L
[T
j
] / l
GT
,l
H
,l
L
[T
j
=25°C]
2.5
2.0
l
GT
Fig.8 Relative variation of critical rate of decrease
of main current versus (dV/dt)c (typical values).
(dI/dt)c [(dV/dt)c] /
specified
(dI/dt)c
2.0
1.8
1.6
1.4
1.5
1.0
0.5
l
H
& l
L
Typical values
1.2
1.0
0.8
T
j
(°C)
0.0
-40
-20
0
20
40
60
80
100
120
140
0.6
0.4
0.1
1.0
(dV/dt)c (V/µs)
10.0
100.0
Fig.9 Relative variation of critical rate of decrease
of main current versus (dV/dt)c.
(dI/dt)c [T
j
] / (dI/dt)c [T
j
specified]
6
5
4
3
2
1
0
0
25
50
T
j
(°C)
75
100
125
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Page 4 of 5
Analogue and Mixed Signal
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