EEWORLDEEWORLDEEWORLD

Part Number

Search

PDM4M4030S12Z

Description
SRAM Module, 64KX32, 12ns, CMOS, PZMA64, ZIP-64
Categorystorage    storage   
File Size217KB,10 Pages
ManufacturerParadigm Technology Inc
Download Datasheet Parametric View All

PDM4M4030S12Z Overview

SRAM Module, 64KX32, 12ns, CMOS, PZMA64, ZIP-64

PDM4M4030S12Z Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerParadigm Technology Inc
Parts packaging codeZIP
package instructionZIP, ZIP64/68,.1,.1
Contacts64
Reach Compliance Codeunknow
ECCN code3A991.B.2.A
Maximum access time12 ns
Other featuresUSER CONFIGURABLE AS 64K X 32
I/O typeCOMMON
JESD-30 codeR-PZMA-T64
JESD-609 codee0
memory density2097152 bi
Memory IC TypeSRAM MODULE
memory width32
Number of functions1
Number of ports1
Number of terminals64
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize64KX32
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeZIP
Encapsulate equivalent codeZIP64/68,.1,.1
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height15.875 mm
Maximum standby current0.24 A
Minimum standby current4.75 V
Maximum slew rate1.28 mA
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch1.27 mm
Terminal locationZIG-ZAG
Maximum time at peak reflow temperatureNOT SPECIFIED
PDM4M4030
64K x 32 CMOS
Static RAM Module
Features:
n
n
1
2
3
4
5
6
7
8
n
n
n
n
n
High-density 2 megabit Static RAM module
Low profile 64-pin ZIP (Zig-zag In-line vertical
Package), 64-pin SIMM or Angled SIMM (Single
In-line Memory Module)
Ultra fast access time: 10 ns (max.)
Surface mounted plastic components on an epoxy
laminate (FR-4) substrate
Single 5V (
±
10%) power supply
Multiple V
SS
pins and decoupling capacitors for
maximum noise immunity
Inputs/outputs directly TTL compatible
The PDM4M4030 is packaged in a 64-pin FR-4 ZIP
(Zig-zag In-line vertical Package), a 64-pin SIMM or
Angled SIMM (Single In-line Memory Module). The
ZIP configuration allows 64 pins to be placed on a
package 3.65” long and 0.35” wide. At only 0.650”
high, this low-profile package is ideal for systems
with minimum board spacing. The SIMM configura-
tion allows use of edge mounted sockets to secure the
module.
All inputs and outputs of the PDM4M4030 are TTL
compatible and operate from a single 5V supply. Full
asynchronous circuitry requires no clock or refresh for
operation and provides equal access and cycle times
for ease of use.
Two identification pins (PD0 and PD1) are provided
for applications in which different density versions of
the module are used. In this way, the target system
can read the respective levels of PD0 and PD1 to
determine a 64K depth.
Description:
The PDM4M4030 is a 64K x 32 static RAM module
constructed on an epoxy laminate (FR-4) substrate
using eight 64K x 4 static RAMs in plastic SOJ
packages. Availability of four chip select lines (one
for each of two RAMs) provides byte access.
Extremely fast speeds can be achieved due to the use
of 256K Static RAMs fabricated in Paradigm’s high-
performance, high-reliability CMOS technology. The
PDM4M4030 is available with access times as fast as
10 ns with minimal power consumption.
Functional Block Diagram
CS
1
ADDRESS
16
CS
2
CS
3
CS
4
2
PD
9
10
11
WE
OE
8
8
64K x 32
RAM
8
8
I/O31-I/O0
12
8-25
Rev 2.2 - 7/17/97
Converts Series 2700 SCPI applications to Series 3700 System Switch/Multimeter System Script applications
For many years, instrument manufacturers have used Standard Commands for Programmable Instruments , or SCPI , to control programmable test and measurement devices in measurement instrument systems. SC...
Jack_ma Test/Measurement
Analysis of IGBT protection principle
Analysis of IGBT protection principles for everyone to share!...
eeleader Industrial Control Electronics
TIVA WARE library bug
I spent the whole day working on the GPIO multiplexing function. The book says that the GPIOPCTL register needs to be configured. I looked it up for a long time and found that only the void GPIOPinCon...
F.N.尼采 Microcontroller MCU
Review of past EEWORLD Newsletters
1. EEWORLD Electronic Journal Issue 1: iSuppli lowers its 2008 market forecast 2. EEWORLD Electronic Journal Issue 2: Top 10 chip stories look forward to 2008 3. EEWORLD e-journal issue 3: CES faces a...
EEWORLD社区 Suggestions & Announcements
[NXP Rapid IoT Review] + Learning and thinking about hardware schematics
I have three days off and need to take care of my kids. I only have some time today to do it! I quickly studied the hardware schematics of the kit and found it more and more powerful. As other players...
anananjjj RF/Wirelessly
[ MicroPython DIY ] Wire Connecting State Detector Wire Connecting State Detector (0)
[i=s]This post was last edited by China Robin Bird on 2018-7-26 19:03[/i][index] [#1] Home page[#2] Scheduling function module[#3] Detection function module[#4] Mechanical button driver module[#5] OLE...
中国罗宾鸟 MicroPython Open Source section

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2042  803  195  1467  1762  42  17  4  30  36 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号