I N T E L L I G E N T
A C C E S S
V O I C E ™
S O L U T I O N S
Quad ISLAC™
Quad Intelligent Subscriber Line Audio-processing Circuit (Quad ISLAC™)
Am79Q2241/2242/2243 Device
APPLICATIONS
Voice over IP/DSL
—
Integrated Access Devices (IAD),
Smart Residential Gateways (SRG), Home Gateway/
Router
Cable Telephony
— NIU, Set-Top Box, Home Side
ORDERING INFORMATION
Device
Am79Q2241 VC
Am79Q2242 JC
Am79Q2243 VC
Package
64-pin TQFP
68-pin PLCC
80-pin TQFP
— Smooth or abrupt polarity reversal
— Loop supervision
— Off-hook debounce circuit
— Ground-key and ring-trip filters
— Ringing generation and control
— Adaptive hybrid balance
— Line and circuit testing
— Tone generation
— Metering generation at 12 kHz and 16 kHz
— Envelope shaping and level control
Selectable PCM/MPI or GCI digital interfaces
— Supports most available master clock frequencies
from 512 kHz to 8.192 MHz
General purpose I/O pins
+3.3 V DC operation
Exceeds LSSGR and ITU requirements
Supports external ringing with on-chip ring-trip
circuit
— Automatic or manual ring-trip modes
Am79Q2241/42/43 Data Sheet
Box, Cable Modem, Cable PC
Fiber
— Fiber in the Loop (FITL), Fiber to the
Home (FTTH)
Wireless Local Loop, Intelligent PBX
DLC-MUX
CO
DESCRIPTION
The Quad ISLAC™ device, in combination with an ISLIC™
device, implements a four channel universal telephone line
interface. This enables the design of a single, low cost, high
performance, fully software programmable line interface for
multiple country applications. All AC, DC, and signaling
parameters are fully programmable via microprocessor or GCI
interfaces. Additionally, the Quad ISLAC device has integrated
self-test and line-test capabilities to resolve faults to the line or
line circuit. The integrated test capability is crucial for remote
applications where dedicated test hardware is not cost
effective.
FEATURES
High performance digital signal processor
provides programmable control of all major
linecard functions
— A-law/µ-law and linear codec
— Transmit and receive gain
— Two-wire AC impedance
— Transhybrid balance
— Equalization
— DC loop feeding
RELATED LITERATURE
080274 Am79D2251 Dual ISLAC Data Sheet
080248 Am79231 ISLIC Data Sheet
080693 Am79240 ISLIC Data Sheet
080249 Am79241 ISLIC Data Sheet
080253 Am79251 ISLIC Data Sheet
080344 Am79R2xx/Am79Q224x Technical Reference
080345 Am79R240/Am79D2251 Technical Reference
BLOCK DIAGRAM
4
A
1
B
1
A
2
B
2
A
3
B
3
A
4
B
4
RC
Networks
and
Protection
7
VCCA
VCCD
DGND
1
DGND
2
ISLIC
LD
1
VREF
7
ISLIC
LD
2
ADGND
1
ADGND
2
4
I/O
1
- I/O
4
TSCA/G
TSCB
DRA/DD
DRB
ISLIC
LD
3
P
1
-P
3
ISLIC
LD
4
DXB
Quad ISLAC
RREF
DXA/DU
DCLK/S0
PCLK/FS
MCLK
RSHB
BATH
RSLB
BATL
RSPB
BATP
CS/RST
DIO/S1
INT
FS/DCL
5
External
Ringing
Sense
Resistors
5
Publication#
080250
Rev:
G
Version:1.0
Date:
Dec 20, 2001
I N T E L L I G E N T
A C C E S S
V O I C E ™
S O L U T I O N S
TABLE OF CONTENTS
APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
ORDERING INFORMATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
RELATED LITERATURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
QUAD ISLAC™ DEVICE INTERNAL BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
FEATURES OF THE INTELLIGENT ACCESS™ CHIPSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
CONNECTION DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
PIN DESCRIPTIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
OPERATING RANGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Environmental Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Electrical Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
INTELLIGENT ACCESS VOICE CHIPSETS SYSTEM TARGET SPECIFICATIONS . . . . . . . . .10
DC SPECIFICATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
TRANSMISSION AND SIGNALING SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
TRANSMIT AND RECEIVE PATHS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
ATTENUATION DISTORTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
GROUP DELAY DISTORTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
SINGLE FREQUENCY DISTORTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
INTERMODULATION DISTORTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
GAIN LINEARITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
TOTAL DISTORTION INCLUDING QUANTIZING DISTORTION . . . . . . . . . . . . . . . . . . . . . . . . .17
OVERLOAD COMPRESSION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
DISCRIMINATION AGAINST OUT-OF-BAND INPUT SIGNALS . . . . . . . . . . . . . . . . . . . . . . . . .18
SPURIOUS OUT-OF-BAND SIGNALS AT THE ANALOG OUTPUT . . . . . . . . . . . . . . . . . . . . . .18
SWITCHING CHARACTERISTICS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
PCM SWITCHING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Microprocessor Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Master Clock: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
PCM Switching Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
GCI TIMING SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
GCI Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
APPLICATION CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
INTERNAL RINGING LINECARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
EXTERNAL RINGING LINECARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
LINECARD PARTS LIST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
PHYSICAL DIMENSIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
68-PIN PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
64-PIN THIN QUAD FLAT PACK (TQFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
80-PIN THIN QUAD FLAT PACK (TQFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
REVISION SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
REVISION A TO REVISION B. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
REVISION B TO REVISIONC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
REVISION C TO REVISION D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
REVISION D TO REVISION E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
REVISION E TO REVISION F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
REVISION F TO G. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
2
Am79Q2241/42/43 Data Sheet
I N T E L L I G E N T
A C C E S S
V O I C E ™
S O L U T I O N S
PRODUCT DESCRIPTION
The Intelligent Access™ voice chipsets integrate all functions of the subscriber line for four subscriber lines. One or more of two
chip types are used to implement the linecard; an ISLIC device and a Quad ISLAC device. These provide the following basic
functions:
1.
The ISLIC device: A high voltage, bipolar IC that drives the subscriber line, maintains longitudinal balance and senses line
conditions.
2. The Quad ISLAC device: A low voltage CMOS IC that provides conversion and DSP functions for all 4 channels.
Complete schematics of linecards using the Intelligent Access voice chipsets for internal and external ringing are shown in
“Application Circuits” on page 26.
The ISLIC device uses reliable, bipolar technology to provide the power necessary to drive a wide variety of subscriber lines. It
can be programmed by the ISLAC device to operate in eight different modes that control power consumption and signaling
modes. This enables it to have full control over the subscriber loop. The ISLIC device is designed to be used exclusively with the
ISLAC device as part of a multiple-line chipset. The ISLIC device requires only +5 V power and the battery supplies for its
operation.
The ISLIC device implements a linear loop-current feeding method with the enhancement of intelligent thermal management in
a controlled manner. This limits the amount of power dissipated on the ISLIC chip by dissipating excess power in external
resistors.
Each ISLAC device contains high-performance codec circuits that provide A/D and D/A conversion for voice (codec), DC-feed
and supervision signals for four subscriber channels. The ISLAC device contains a DSP core that handles signaling, DC-feed,
supervision and line diagnostics for all four channels.
The DSP core selectively interfaces with three types of backplanes:
•
Standard PCM/MPI
•
Standard GCI
•
Modified GCI with a single analog line per GCI channel
The Intelligent Access voice chipset provides a complete software configurable solution to the BORSCHT functions as well as
complete programmable control over subscriber line DC-feed characteristics, such as current limit and feed resistance. In
addition, these chipsets provide system level solutions for the loop supervisory functions and metering. In total, they provide a
programmable solution that can satisfy worldwide linecard requirements by software configuration.
Software programmed filter coefficients, DC-feed data and supervision data are easily calculated with the WinSLACä software.
This PC software is provided free of charge. It allows the designer to enter a description of system requirements. WinSLAC then
computes the necessary coefficients and plots the predicted system results.
The ISLIC interface unit inside the ISLAC device processes information regarding the line voltages, loop currents and battery
voltage levels. These inputs allow the ISLAC device to place several key ISLIC performance parameters under software control.
The main functions that can be observed and/or controlled through the ISLAC backplane interface are:
•
DC-feed characteristics
•
Ground-key detection
•
Off-hook detection
•
Metering signal
•
Longitudinal operating point
•
Subscriber line voltage and currents
•
Ring-trip detection
•
Abrupt and smooth battery reversal
•
Subscriber line matching
•
Ringing generation
•
Sophisticated line and circuit tests
To accomplish these functions, the ISLIC device collects the following information and feeds it, in analog form, to the ISLAC
device:
•
•
•
•
•
•
•
The metallic (IMT) and longitudinal (ILG) loop currents
The AC (VTX) and DC (VSAB) loop voltages
The outputs supplied by the ISLAC device to the ISLIC device are then:
A voltage (VHLi) that provides control for the following high-level ISLIC device outputs:
DC loop current
Internal ringing signal
12 or 16 kHz metering signal
Am79Q2241/42/43 Data Sheet
3
I N T E L L I G E N T
A C C E S S
V O I C E ™
S O L U T I O N S
•
A low-level voltage proportional to the voice signal (VOUTi)
•
A voltage that controls longitudinal offset for test purposes (VLBi)
The ISLAC device performs the codec and filter functions associated with the four-wire section of the subscriber line circuitry in
a digital switch. These functions involve converting an analog voice signal into digital PCM samples and converting digital PCM
samples back into an analog signal. During conversion, digital filters are used to band-limit the voice signals.
The user-programmable filters set the receive and transmit gain, perform the transhybrid balancing function, permit adjustment
of the two-wire termination impedance and provide frequency attenuation adjustment (equalization) of the receive and transmit
paths. Adaptive transhybrid balancing is also included. All programmable digital filter coefficients can be calculated using
WinSLAC software. The PCM codes can be either 16-bit linear two’s-complement or 8-bit companded A-law or µ-law.
Besides the codec functions, the Intelligent Access voice chipset provides all the sensing, feedback, and clocking necessary to
completely control ISLIC device functions with programmable parameters. System-level parameters under programmable control
include active loop current limits, feed resistance, and feed mode voltages.
The ISLAC device supplies complete mode control to the ISLIC device using the control bus and (P1-P3) tri-level load signal
(LDi).
The Intelligent Access voice chipset provides extensive loop supervision capability including off-hook, ring-trip and ground-key
detection. Detection thresholds for these functions are programmable. A programmable debounce timer is available that
eliminates false detection due to contact bounce.
For subscriber line diagnostics, AC and DC line conditions can be monitored using built in test tools. Measured parameters can
be compared to programmed threshold levels to set a pass/fail bit. The user can choose to send the actual PCM measurement
data directly to a higher level processor by way of the voice channel. Both longitudinal and metallic resistance and capacitance
can be measured, which allows leakage resistance, line capacitance, and telephones to be identified.
Quad ISLAC™ Device Internal Block Diagram
IREF VREF
VHL
1
VLB
1
VOUT
1
VINI
1
VSAB
1
VIMT
1
VILG
1
XSB
1
Ch 1
Converter
Block
Clock and
Reference
Circuits
PCM
and
GCI
Interface
and
Time Slot
Assigner
MCLK
FS/DCL
PCLK/FS
DXA/DU
DRA/DD
TSCA/G
DXB
DRB
TSCB
DCLK/S0
Ch 2
(as Ch 1)
DIO/S1
CS/RST
INT
I/O
1
I/O
2
I/O
3
I/O
4
LD
1
LD
2
Ch 4
(as Ch 1)
ISLIC
Control
Logic
LD
3
LD
4
P
1
P
2
P
3
XSC
SHB
SLB
SPB
Digital
Signal
Processor
GCI Control
Logic and
Microprocessor
Interface
Ch 3
(as Ch 1)
Common
External
Sense
Inputs
4
Am79Q2241/42/43 Data Sheet
I N T E L L I G E N T
A C C E S S
V O I C E ™
S O L U T I O N S
Features of the Intelligent Access™ Chipset
•
•
•
Performs all battery feed, ringing, signaling, hybrid and
test (BORSCHT) functions
Two chip solution supports high density, multi-channel
architecture
Single hardware design meets multiple country require-
ments through software programming of:
– Ringing waveform and frequency
– DC loop-feed characteristics and current-limit
– Loop-supervision detection thresholds
– Off-hook debounce circuit
– Ground-key and ring-trip filters
– Off-hook detect de-bounce interval
– Two-wire AC impedance
– Transhybrid balance
– Transmit and receive gains
– Equalization
– Digital I/O pins
– A-law/µ-law and linear selection
Supports internal and external battery-backed ringing
– Self-contained ringing generation and control
– Supports external ringing generator and ring relay
– Ring relay operation synchronized to zero crossings
of ringing voltage and current
– Integrated ring-trip filter and software enabled man-
ual or automatic ring-trip mode
Supports metering generation with envelope shaping
Smooth or abrupt polarity reversal
Adaptive transhybrid balance
– Continuous or adapt and freeze
•
•
•
Supports both loop-start and ground-start signaling
Exceeds LSSGR and CCITT central office requirements
Selectable PCM or GCI interface
– Supports most available master clock frequencies
from 512 kHz to 8.192 MHz
On-hook transmission
Power/service denial mode
Line-feed characteristics independent of battery voltage
Only 5 V, 3.3 V and battery supplies needed
Low idle-power per line
Linear power-feed with intelligent power-management
feature
Compatible with inexpensive protection networks;
Accommodates low-tolerance fuse resistors while main-
taining longitudinal balance
Monitors two-wire interface voltages and currents for
subscriber line diagnostics
Built-in voice-path test modes
Power-cross, fault, and foreign voltage detection
Integrated line-test features
– Leakage
– Line and ringer capacitance
– Loop resistance
Integrated self-test features
– Echo gain, distortion, and noise
Small physical size
Up to three relay drivers per ISLIC™ device
– Configurable as test load switches
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Am79Q2241/42/43 Data Sheet
5
Embedded System
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