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5962-0720102MLA

Description
ATMEL - ATF750C-10JU - IC; CPLD; EEPROM; 10 MACROCELL; 10NS; PLCC-28
CategoryProgrammable logic devices    Programmable logic   
File Size396KB,25 Pages
ManufacturerAtmel (Microchip)
Download Datasheet Parametric Compare View All

5962-0720102MLA Overview

ATMEL - ATF750C-10JU - IC; CPLD; EEPROM; 10 MACROCELL; 10NS; PLCC-28

5962-0720102MLA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeDIP
package instructionDIP, DIP24,.3
Contacts24
Reach Compliance Codecompli
ECCN code3A001.A.2.C
Other featuresNO
maximum clock frequency55 MHz
In-system programmableNO
JESD-30 codeR-GDIP-T24
JESD-609 codee0
JTAG BSTNO
length32 mm
Dedicated input times11
Number of I/O lines10
Number of macro cells10
Number of terminals24
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize11 DEDICATED INPUTS, 10 I/O
Output functionMACROCELL
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply5 V
Programmable logic typeEE PLD
propagation delay15 ns
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height5.08 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
Base Number Matches1
Features
Advanced, High-speed, Electrically-erasable Programmable Logic Device
– Superset of 22V10
– Enhanced Logic Flexibility
– Backward Compatible with ATV750B/BL and ATV750/L
Low-power Edge-sensing “L” Option with 1 mA Standby Current
D- or T-type Flip-flop
Product Term or Direct Input Pin Clocking for Flip-flop
7.5 ns Maximum Pin-to-pin Delay with 5V Operation
Highest Density Programmable Logic Available in 24-pin and 28-pin Packages
– Advanced Electrically-erasable Technology
– Reprogrammable
– 100% Tested
Increased Logic Flexibility
– 42 Array Inputs, 20 Sum Terms and 20 Flip-flops
Enhanced Output Logic Flexibility
– All 20 Flip-flops Feed Back Internally
– 10 Flip-flops are also Available as Outputs
Programmable Pin-keeper Circuits
Dual-in-line and Surface Mount Package in Standard Pinouts
Full Military, Commercial and Industrial Temperature Ranges
20-year Data Retention
2000V ESD Protection
1000 Erase/Write Cycles
Green Package Options (Pb/Halide-free/RoHS Compliant) Available
High-speed
Complex
Programmable
Logic Device
ATF750C
ATF750CL
1. Block Diagram
(OE PRODUCT TERMS)
12
INPUT
PINS
PROGRAMMABLE
INTERCONNECT
AND
COMBINATORIAL
LOGIC ARRAY
4 TO 8
PRODUCT
TERMS
LOGIC
OPTION
(UP T0 20
FLIP-FLOPS)
OUTPUT
OPTION
10
I/O
PINS
(CLOCK PIN)
0776L–PLD–11/08

5962-0720102MLA Related Products

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Description ATMEL - ATF750C-10JU - IC; CPLD; EEPROM; 10 MACROCELL; 10NS; PLCC-28 ATMEL - ATF750C-10JU - IC; CPLD; EEPROM; 10 MACROCELL; 10NS; PLCC-28 ATMEL - ATF750C-10JU - IC; CPLD; EEPROM; 10 MACROCELL; 10NS; PLCC-28 ATMEL - ATF750C-10JU - IC; CPLD; EEPROM; 10 MACROCELL; 10NS; PLCC-28 ATMEL - ATF750C-10JU - IC; CPLD; EEPROM; 10 MACROCELL; 10NS; PLCC-28 ATMEL - ATF750C-10JU - IC; CPLD; EEPROM; 10 MACROCELL; 10NS; PLCC-28
Is it Rohs certified? incompatible incompatible incompatible conform to conform to incompatible
Parts packaging code DIP QLCC QLCC LCC TSSOP QLCC
package instruction DIP, DIP24,.3 QCCN, LCC28,.45SQ QCCN, LCC28,.45SQ QCCJ, LDCC28,.5SQ TSSOP, TSSOP24,.25 QCCN, LCC28,.45SQ
Contacts 24 28 28 28 24 28
Reach Compliance Code compli compli compli unknown compli compli
Other features NO NO NO NO NO NO
maximum clock frequency 55 MHz 83 MHz 55 MHz 83 MHz 83 MHz 55 MHz
In-system programmable NO NO NO NO NO NO
JESD-30 code R-GDIP-T24 S-CQCC-N28 S-CQCC-N28 S-PQCC-J28 R-PDSO-G24 S-CQCC-N28
JTAG BST NO NO NO NO NO NO
length 32 mm 11.43 mm 11.43 mm 11.5062 mm 7.8 mm 11.43 mm
Dedicated input times 11 11 11 11 11 11
Number of I/O lines 10 10 10 10 10 10
Number of macro cells 10 10 10 10 10 10
Number of terminals 24 28 28 28 24 28
Maximum operating temperature 125 °C 125 °C 125 °C 85 °C 85 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -40 °C -40 °C -55 °C
organize 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O
Output function MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL
Package body material CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP QCCN QCCN QCCJ TSSOP QCCN
Encapsulate equivalent code DIP24,.3 LCC28,.45SQ LCC28,.45SQ LDCC28,.5SQ TSSOP24,.25 LCC28,.45SQ
Package shape RECTANGULAR SQUARE SQUARE SQUARE RECTANGULAR SQUARE
Package form IN-LINE CHIP CARRIER CHIP CARRIER CHIP CARRIER SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER
power supply 5 V 5 V 5 V 5 V 5 V 5 V
Programmable logic type EE PLD EE PLD EE PLD EE PLD EE PLD EE PLD
propagation delay 15 ns 10 ns 15 ns 10 ns 10 ns 15 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 5.08 mm 2.54 mm 2.54 mm 4.572 mm 1.2 mm 2.54 mm
Maximum supply voltage 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V 5 V 5 V 5 V
surface mount NO YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY INDUSTRIAL INDUSTRIAL MILITARY
Terminal form THROUGH-HOLE NO LEAD NO LEAD J BEND GULL WING NO LEAD
Terminal pitch 2.54 mm 1.27 mm 1.27 mm 1.27 mm 0.65 mm 1.27 mm
Terminal location DUAL QUAD QUAD QUAD DUAL QUAD
width 7.62 mm 11.43 mm 11.43 mm 11.5062 mm 4.4 mm 11.43 mm
Base Number Matches 1 1 1 1 1 1
ECCN code 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C EAR99 - 3A001.A.2.C
JESD-609 code e0 e0 e0 e3 - e0
Filter level MIL-STD-883 MIL-STD-883 MIL-STD-883 - - MIL-STD-883
Terminal surface TIN LEAD TIN LEAD TIN LEAD Matte Tin (Sn) - Tin/Lead (Sn/Pb)
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