QD80C51BH datasheet, PDF - EEWORLD Datasheet

QD80C51BH: DescriptionMicrocontroller, 8-Bit, UVPROM, 8051 CPU, 6MHz, CMOS, CDIP40, CERDIP-40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size741KB，22 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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QD80C51BH Overview

Microcontroller, 8-Bit, UVPROM, 8051 CPU, 6MHz, CMOS, CDIP40, CERDIP-40

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Intel
Parts packaging code	DIP
package instruction	DIP, DIP40,.6
Contacts	40
Reach Compliance Code	compli
Has ADC	NO
Other features	BOOLEAN PROCESSOR; EMULATION HARDWARE
Address bus width	16
bit size	8
boundary scan	NO
CPU series	8051
maximum clock frequency	12 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	R-GDIP-T40
JESD-609 code	e0
length	52.325 mm
low power mode	YES
Number of DMA channels
Number of external interrupt devices	2
Number of I/O lines	32
Number of serial I/Os	1
Number of terminals	40
Number of timers	2
On-chip data RAM width	8
On-chip program ROM width	8
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	NO
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	128
RAM (number of words)	128
rom(word)	4000
ROM programmability	UVPROM
Maximum seat height	5.72 mm
speed	6 MHz
Maximum slew rate	20 mA
Maximum supply voltage	6 V
Minimum supply voltage	4 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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