S29GLxxxM MirrorBit
TM
Flash Family
S29GL256M, S29GL128M, S29GL064M, S29GL032M
256 Megabit, 128 Megabit, 64 Megabit, and 32Megabit,
3.0 Volt-only Page Mode Flash Memory featuring
0.23 um MirrorBit process technology
Datasheet
DATASHEET
Distinctive Characteristics
Architectural Advantages
Single power supply operation
— 3 volt read, erase, and program operations
Manufactured on 0.23 um MirrorBit process
technology
SecSi™ (Secured Silicon) Sector region
— 128-word/256-byte sector for permanent, secure
identification through an 8-word/16-byte random
Electronic Serial Number, accessible through a
command sequence
— May be programmed and locked at the factory or by
the customer
Flexible sector architecture
— 256Mb: 512 32 Kword (64 Kbyte) sectors
— 128Mb: 256 32 Kword (64 Kbyte) sectors
— 64Mb (uniform sector models): 128 32 Kword (64
Kbyte) sectors or 128 32 Kword sectors
— 64Mb (boot sector models): 127 32 Kword (64 Kbyte)
sectors + 8 4Kword (8Kbyte) boot sectors
— 32Mb (uniform sector models): 64 32Kword (64
Kbyte) sectors of 64 32Kword sectors
— 32Mb (boot sector models): 63 32Kword (64 Kbyte)
sectors + 8 4Kword (8Kbyte) boot sectors
Compatibility with JEDEC standards
— Provides pinout and software compatibility for single-
power supply flash, and superior inadvertent write
protection
100,000 erase cycles typical per sector
20-year data retention typical
Package options
— 40-pin TSOP
— 48-pin TSOP
— 56-pin TSOP
— 64-ball Fortified BGA
— 48-ball fine-pitch BGA
— 63-ball fine-pitch BGA
Software & Hardware Features
Software features
— Program Suspend & Resume: read other sectors
before programming operation is completed
— Erase Suspend & Resume: read/program other
sectors before an erase operation is completed
— Data# polling & toggle bits provide status
— CFI (Common Flash Interface) compliant: allows host
system to identify and accommodate multiple flash
devices
— Unlock Bypass Program command reduces overall
multiple-word programming time
Hardware features
— Sector Group Protection: hardware-level method of
preventing write operations within a sector group
— Temporary Sector Unprotect: V
ID
-level method of
charging code in locked sectors
— WP#/ACC input accelerates programming time
(when high voltage is applied) for greater throughput
during system production. Protects first or last sector
regardless of sector protection settings on uniform
sector models
— Hardware reset input (RESET#) resets device
— Ready/Busy# output (RY/BY#) detects program or
erase cycle completion
Performance Characteristics
High performance
— 90 ns access time (128Mb, 64Mb, 32Mb),
100 ns access time (256Mb)
— 4-word/8-byte page read buffer
— 25 ns page read times (128Mb, 64Mb, 32Mb)
— 30 ns page read times (256Mb)
— 16-word/32-byte write buffer
— 16-word/32-byte write buffer reduces overall
programming time for multiple-word updates
Low power consumption (typical values at 3.0 V, 5
MHz)
— 18 mA typical active read current (64 Mb, 32 Mb)
— 25 mA typical active read current (256 Mb, 128 Mb)
— 50 mA typical erase/program current
— 1 µA typical standby mode current
Publication Number
S29GLxxxM_00
Revision
B
Amendment
0
Issue Date
May 24 ,2004
D a t a s h e e t
General Description
The S29GL256/128/064/032M family of devices are 3.0 V single power Flash
memory manufactured using 0.23 um MirrorBit technology. The S29GL256M is a
256 Mbit, organized as 16,777,216 words or 33,554,432 bytes. The S29GL128M
is a 128 Mbit, organized as 8,388,608 words or 16,777,216 bytes. The
S29GL064M is a 64 Mbit, organized as 4,194,304 words or 8,388,608 bytes. The
S29GL032M is a 32 Mbit, organized as 2,097,152 words or 4,194,304 bytes. De-
pending on the model number, the devices have an 8-bit wide data bus only, 16-
bit wide data bus only, or a 16-bit wide data bus that can also function as an 8-
bit wide data bus by using the BYTE# input. The devices can be programmed ei-
ther in the host system or in standard EPROM programmers.
Access times as fast as 90 ns (S29GL128M, S29GL064M, S29GL032M) or 100 ns
(S29GL256M) are available. Note that each access time has a specific operating
voltage range (V
CC
) as specified in the
Product Selector Guide
and the
Ordering
Information
sections. Package offerings include 40-pin TSOP, 48-pin TSOP, 56-pin
TSOP, 48-ball fine-pitch BGA, 63-ball fine-pitch BGA and 64-ball Fortified BGA,
depending on model number. Each device has separate chip enable (CE#), write
enable (WE#) and output enable (OE#) controls.
Each device requires only a
single 3.0 volt power supply
for both read and
write functions. In addition to a V
CC
input, a high-voltage
accelerated program
(ACC)
feature provides shorter programming times through increased current on
the WP#/ACC input. This feature is intended to facilitate factory throughput dur-
ing system production, but may also be used in the field if desired.
The device is entirely command set compatible with the
JEDEC single-power-
supply Flash standard.
Commands are written to the device using standard mi-
croprocessor write timing. Write cycles also internally latch addresses and data
needed for the programming and erase operations.
The
sector erase architecture
allows memory sectors to be erased and repro-
grammed without affecting the data contents of other sectors. The device is fully
erased when shipped from the factory.
Device programming and erasure are initiated through command sequences.
Once a program or erase operation has begun, the host system need only poll the
DQ7 (Data# Polling) or DQ6 (toggle)
status bits
or monitor the
Ready/Busy#
(RY/BY#)
output to determine whether the operation is complete. To facilitate
programming, an
Unlock Bypass
mode reduces command sequence overhead
by requiring only two write cycles to program data instead of four.
Hardware data protection
measures include a low V
CC
detector that automat-
ically inhibits write operations during power transitions. The hardware sector
protection feature disables both program and erase operations in any combina-
tion of sectors of memory. This can be achieved in-system or via programming
equipment.
The
Erase Suspend/Erase Resume
feature allows the host system to pause an
erase operation in a given sector to read or program any other sector and then
complete the erase operation. The
Program Suspend/Program Resume
fea-
ture enables the host system to pause a program operation in a given sector to
read any other sector and then complete the program operation.
The
hardware RESET# pin
terminates any operation in progress and resets the
device, after which it is then ready for a new operation. The RESET# pin may be
tied to the system reset circuitry. A system reset would thus also reset the device,
2
S29GLxxxM MirrorBit
TM
Flash Family
S29GLxxxM_00B0 May 24 ,2004
D a t a s h e e t
enabling the host system to read boot-up firmware from the Flash memory
device.
The device reduces power consumption in the
standby mode
when it detects
specific voltage levels on CE# and RESET#, or when addresses have been stable
for a specified period of time.
The
Write Protect (WP#)
feature protects the first or last sector by asserting
a logic low on the WP#/ACC pin or WP# pin, depending on model number. The
protected sector will still be protected even during accelerated programming.
The
SecSi™ (Secured Silicon) Sector
provides a 128-word/256-byte area for
code or data that can be permanently protected. Once this sector is protected,
no further changes within the sector can occur.
Spansion MirrorBit flash technology combines years of Flash memory manufac-
turing experience to produce the highest levels of quality, reliability and cost
effectiveness. The device electrically erases all bits within a sector simultaneously
via hot-hole assisted erase. The data is programmed using hot electron injection.
May 24 ,2004 S29GLxxxM_00B0
S29GLxxxM MirrorBit
TM
Flash Family
3
Table of Contents
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .6
S29GL256M .............................................................................................................6
S29GL128M ..............................................................................................................6
S29GL064M .............................................................................................................6
S29GL032M .............................................................................................................6
Table 15. S29GL032M (Model R0) Sector Group Protection/Unpro-
tection Address Table ........................................................80
Table 16. S29GL032M (Model R1) Top Boot Sector Protection ..80
Table 17. S29GL032M (Model R2) Bottom Boot Sector Protection
81
Table 18. S29GL032M (Models R3, R4) Sector Group Protection/Un-
protection Address Table ....................................................81
Table 19. S29GL065M (Model 00) Sector Group Protection/Unpro-
tection Address Table ........................................................83
Table 20. S29GL064M (Model R1) Top Boot Sector Protection ..83
Table 21. S29GL064M (Model R2) Bottom Boot Sector Protection
84
Table 22. S29GL064M (Models R3, R4) Sector Group Protection/Un-
protection Address Table ....................................................85
Table 23. S29GL064M (Model R5) Sector Group Protection/Unpro-
tection Address Table ........................................................87
Table 24. S29GL064M (Models R6, R7) Sector Group Protection/Un-
protection Address Table ....................................................88
Table 25. S29GL128M Sector Group Protection/Unprotection
Address Table ....................................................................88
Table 26. S29GL256M Sector Group Protection/Unprotection
Address Table ....................................................................90
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .8
For S29GL064M (model R0) only. ................................................................. 10
For S29GL064M (model R0) only. ................................................................. 14
Special Package Handling Instructions ...........................................................15
For S29GL032M (model R0) only. ................................................................. 16
Logic Symbol-S29GL032M (Model R0) ......................................................... 18
Logic Symbol-S29GL032M (Models R1, R2) ................................................. 18
Logic Symbol-S29GL032M (Models R3, R4) ................................................ 18
Logic Symbol-S29GL064M (Models R0) ....................................................... 19
Logic Symbol-S29GL064M (Models R1, R2) ................................................ 19
Logic Symbol-S29GL064M (Models R3, R4) ............................................... 19
Logic Symbol-S29GL064M (Model R5) ........................................................ 20
Logic Symbol-S29GL064M (Model R6, R7) ................................................ 20
Logic Symbol-S29GL128M ................................................................................ 20
Logic Symbol-S29GL256M ................................................................................ 21
Temporary Sector Group Unprotect .......................................................... 94
Figure 1. Temporary Sector Group Unprotect Operation .......... 94
Figure 2. In-System Sector Group
Protect/Unprotect Algorithms............................................... 95
Ordering Information-S29GL032M . . . . . . . . . . . . 22
S29GL032M Standard Products ..................................................................... 22
Ordering Information-S29GL064M . . . . . . . . . . . .24
S29GL064M Standard Products ..................................................................... 24
Ordering Information-S29GL128M . . . . . . . . . . . .26
S29GL128M Standard Products ...................................................................... 26
Ordering Information-S29GL256M . . . . . . . . . . . . 27
S29GL256M Standard Products ......................................................................27
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .28
Table 1. Device Bus Operations ........................................... 28
SecSi (Secured Silicon) Sector Flash Memory Region .............................96
Write Protect (WP#) ....................................................................................... 97
Hardware Data Protection ............................................................................. 97
Low VCC Write Inhibit ............................................................................... 97
Write Pulse “Glitch” Protection ...............................................................98
Logical Inhibit ...................................................................................................98
Power-Up Write Inhibit ...............................................................................98
Word/Byte Configuration ............................................................................... 29
Requirements for Reading Array Data ........................................................ 29
Page Mode Read ............................................................................................. 29
Writing Commands/Command Sequences ................................................ 29
Write Buffer .................................................................................................... 30
Accelerated Program Operation .............................................................. 30
Autoselect Functions .................................................................................... 30
Standby Mode ...................................................................................................... 30
Automatic Sleep Mode .......................................................................................31
RESET#: Hardware Reset Pin ..........................................................................31
Output Disable Mode .........................................................................................31
Table 2. S29GL032M (Model R0) Sector Address Table ........... 32
Table 3. S29GL032M (Models R1, R2) Sector Address Table .... 34
Table 4. S29GL032M (Model R3) Top Boot Sector Architecture 36
Table 5. S29GL032M (Model R4) Bottom Boot Sector Architecture
38
Table 6. S29GL064M (Model R0) Sector Address Table ........... 40
Table 7. S29GL064M (Model R1, R2) Sector Address Table ..... 44
Table 8. S29GL064M (Model R3) Top Boot Sector Architecture 47
Table 9. S29GL064M (Model R4) Bottom Boot Sector Architecture
51
Table 10. S29GL064M (Model R5) Sector Address Table ......... 55
Table 11. S29GL064M (Model R6, R7) Sector Address Table .... 58
Table 12. S29GL128M Sector Address Table ......................... 61
Table 13. S29GL256M Sector Address Table ......................... 67
Common Flash Memory Interface (CFI) . . . . . . 98
Table 28. System Interface String........................................ 99
Command Definitions . . . . . . . . . . . . . . . . . . . . . 101
Reading Array Data ..........................................................................................102
Reset Command ................................................................................................102
Autoselect Command Sequence ..................................................................103
Enter SecSi Sector/Exit SecSi Sector Command Sequence ..................103
Word Program Command Sequence .....................................................103
Unlock Bypass Command Sequence .......................................................104
Write Buffer Programming ........................................................................104
Accelerated Program ...................................................................................106
Figure 3. Write Buffer Programming Operation..................... 107
Figure 4. Program Operation ............................................. 108
Program Suspend/Program Resume Command Sequence .................. 108
Figure 5. Program Suspend/Program Resume ...................... 109
Chip Erase Command Sequence ..................................................................109
Sector Erase Command Sequence ................................................................110
Figure 6. Erase Operation ................................................. 111
Erase Suspend/Erase Resume Commands ...................................................111
Command Definitions ........................................................................................113
Write Operation Status ...................................................................................115
DQ7: Data# Polling ...........................................................................................115
Figure 7. Data# Polling Algorithm ...................................... 116
Table 31. Command Definitions (x16 Mode, BYTE# = V
IH
) .... 113
Table 32. Command Definitions (x8 Mode, BYTE# = V
IL
) ....... 114
Autoselect Mode ................................................................................................ 78
Table 14. Autoselect Codes, (High Voltage Method) .............. 79
RY/BY#: Ready/Busy# .......................................................................................116
DQ6: Toggle Bit I ...............................................................................................117
Figure 8. Toggle Bit Algorithm ........................................... 118
Sector Group Protection and Unprotection ..............................................79
May 24 ,2004 S29GLxxxM_00B0
S29GLxxxM MirrorBit
TM
Flash Family
4
DQ2: Toggle Bit II ..............................................................................................118
Reading Toggle Bits DQ6/DQ2 ..................................................................... 119
DQ5: Exceeded Timing Limits ....................................................................... 119
DQ3: Sector Erase Timer ................................................................................ 119
DQ1: Write-to-Buffer Abort .........................................................................120
Table 33. Write Operation Status ........................................120
Figure 9. Maximum Negative Overshoot Waveform ............... 121
Figure 10. Maximum Positive
Overshoot Waveform ........................................................ 121
Temporary Sector Unprotect ....................................................................... 136
Figure 22. Temporary Sector Group Unprotect Timing Diagram 136
Figure 23. Sector Group Protect and Unprotect Timing Diagram 137
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 121
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 122
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Figure 11. Test Setup ....................................................... 123
Table 34. Test Specifications ..............................................123
Alternate CE# Controlled Erase and Program Operations-S29GL256M
138
Alternate CE# Controlled Erase and Program Operations-S29GL128M
139
Alternate CE# Controlled Erase and Program Operations-S29GL064M
140
Alternate CE# Controlled Erase and Program Operations-S29GL032M
141
Figure 24. Alternate CE# Controlled Write (Erase/Program)
Operation Timings............................................................ 142
Key to Switching Waveforms . . . . . . . . . . . . . . 123
Figure 12. Input Waveforms and
Measurement Levels ......................................................... 123
Erase And Programming Performance . . . . . . . .143
TSOP Pin and BGA Package Capacitance . . . . .144
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . .145
TS040—40-Pin Standard Thin Small Outline Package ...........................145
TS048—48-Pin Standard/Reverse Thin Small Outline Package (TSOP)
147
TSR048—48-Pin Standard/Reverse Thin Small Outline Package (TSOP)
148
TS056/TSR056—56-Pin Standard/Reverse Thin Small Outline Package
(TSOP) ..................................................................................................................149
LAA064—64-Ball Fortified Ball Grid Array (FBGA) ..............................150
LAC064—64-Pin 18 x 12 mm package ..........................................................151
FBA048—48-Pin 6.15 x 8.15 mm package ...................................................152
FBC048—48-Pin 8 x 9 mm package ........................................................... 153
FBE063—63-Pin 12 x 11 mm package ............................................................154
FPT-48P-M19 ....................................................................................................... 155
FPT-56P-M01 .......................................................................................................156
BGA-48P-M20 .................................................................................................... 157
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 124
Read-Only Operations-S29GL256M only .................................................. 124
Read-Only Operations-S29GL128M only ................................................... 124
Read-Only Operations-S29GL064M only .................................................. 125
Read-Only Operations-S29GL032M only .................................................. 125
Figure 13. Read Operation Timings ..................................... 126
Figure 14. Page Read Timings ............................................ 126
Hardware Reset (RESET#) ............................................................................. 127
Figure 15. Reset Timings................................................... 127
Erase and Program Operations-S29GL256M only ..................................128
Erase and Program Operations-S29GL128M only ................................... 129
Erase and Program Operations-S29GL064M only .................................. 130
Erase and Program Operations-S29GL032M only ................................... 131
Figure 16. Program Operation Timings ................................
Figure 17. Accelerated Program Timing Diagram ..................
Figure 18. Chip/Sector Erase Operation Timings ...................
Figure 19. Data# Polling Timings
(During Embedded Algorithms) ..........................................
Figure 20. Toggle Bit Timings (During Embedded Algorithms)
Figure 21. DQ2 vs. DQ6 ....................................................
132
132
133
134
135
135
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . .158
Pin Description ..............................................................................................159
Logic Symbols .................................................................................................160
May 24 ,2004 S29GLxxxM_00B0
S29GLxxxM MirrorBit
TM
Flash Family
5
Microcontroller MCU
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