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MTB71040L

Description
60A, 100V, 0.024ohm, N-CHANNEL, Si, POWER, MOSFET
CategoryDiscrete semiconductor    The transistor   
File Size177KB,8 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

MTB71040L Overview

60A, 100V, 0.024ohm, N-CHANNEL, Si, POWER, MOSFET

MTB71040L Parametric

Parameter NameAttribute value
MakerMotorola ( NXP )
package instructionSMALL OUTLINE, R-PSSO-G2
Reach Compliance Codeunknow
Other featuresLOGIC LEVEL COMPATIBLE
Avalanche Energy Efficiency Rating (Eas)540 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage100 V
Maximum drain current (Abs) (ID)60 A
Maximum drain current (ID)60 A
Maximum drain-source on-resistance0.024 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PSSO-G2
JESD-609 codee0
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Maximum operating temperature175 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)242 W
Maximum pulsed drain current (IDM)210 A
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal locationSINGLE
transistor applicationsSWITCHING
Transistor component materialsSILICON
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MTB71040L/D
Advance Information
TMOS E-FET.
High Energy Power FET
D2PAK for Surface Mount
N–Channel Enhancement–Mode Silicon Gate
The D2PAK package has the capability of housing a larger die
than any existing surface mount package which allows it to be used
in applications that require the use of surface mount components
with higher power and lower RDS(on) capabilities. This advanced
TMOS E–FET is designed to withstand high energy in the
avalanche and commutation modes. This new energy efficient
design also offers a drain–to–source diode with a fast recovery
time. Designed for medium voltage, high speed switching applica-
tions in power supplies, converters and PWM motor controls.
These devices are particularly well suited for bridge circuits where
diode speed and commutating safe operating areas are critical and
offer additional safety margin against unexpected voltage tran-
sients.
New Features of TMOS 7
Ultra Low On–Resistance Provides Higher Efficiency
Reduced Gate Charge
Features Common to TMOS 7 and TMOS E–FETS
Logic Level Gate Drive
Avalanche Energy Specified
Diode Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
Industry Standard D2PAK Surface Mount Package
Surface Mount Package Available in 24 mm, 13–inch/800 Unit
Tape & Reel, Add T4 Suffix to Part Number
MAXIMUM RATINGS
(TC = 25°C unless otherwise noted)
Rating
Drain–to–Source Voltage
Drain–to–Gate Voltage (RGS = 1.0 MΩ)
Gate–to–Source Voltage — Continuous
Gate–to–Source Voltage
— Non–Repetitive (tp
10 ms)
Drain Current — Continuous
Drain Current
— Continuous @ 100°C
Drain Current
— Single Pulse (tp
10
µs)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 60 Vdc, VGS = 5.0 Vdc, PEAK IL = 60 Apk, L = 0.3 mH, RG = 25
Ω)
Thermal Resistance — Junction to Case
Thermal Resistance
— Junction to Ambient
Thermal Resistance
— Junction to Ambient (1)
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
MTB71040L
TMOS POWER FET
60 AMPERES
100 VOLTS
RDS(on) = 0.022
W
®
N–Channel
D
CASE 418B–03, Style 2
D2PAK
G
S
Symbol
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
Value
100
100
±
20
±
25
60
48
210
242
1.61
3.0
– 55 to 175
540
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
TJ, Tstg
EAS
R
θJC
R
θJA
R
θJA
TL
0.62
62.5
50
260
°C/W
°C
This document contains information on a new product. Specifications and information herein are subject to change without notice.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
REV 1
©
Motorola TMOS
Motorola, Inc. 1999
Power MOSFET Transistor Device Data
1

MTB71040L Related Products

MTB71040L MTB71040LT4
Description 60A, 100V, 0.024ohm, N-CHANNEL, Si, POWER, MOSFET 60A, 100V, 0.024ohm, N-CHANNEL, Si, POWER, MOSFET
Maker Motorola ( NXP ) Motorola ( NXP )
package instruction SMALL OUTLINE, R-PSSO-G2 SMALL OUTLINE, R-PSSO-G2
Reach Compliance Code unknow unknow
Other features LOGIC LEVEL COMPATIBLE LOGIC LEVEL COMPATIBLE
Avalanche Energy Efficiency Rating (Eas) 540 mJ 540 mJ
Shell connection DRAIN DRAIN
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 100 V 100 V
Maximum drain current (Abs) (ID) 60 A 60 A
Maximum drain current (ID) 60 A 60 A
Maximum drain-source on-resistance 0.024 Ω 0.024 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JESD-30 code R-PSSO-G2 R-PSSO-G2
JESD-609 code e0 e0
Number of components 1 1
Number of terminals 2 2
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 175 °C 175 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Polarity/channel type N-CHANNEL N-CHANNEL
Maximum power dissipation(Abs) 242 W 242 W
Maximum pulsed drain current (IDM) 210 A 210 A
Certification status Not Qualified Not Qualified
surface mount YES YES
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING
Terminal location SINGLE SINGLE
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
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