MOTOROLA
Order this document
by MC68HC16Z1TS/D Rev. 3
SEMICONDUCTOR
TECHNICAL DATA
MC68HC16Z1
Technical Summary
16-Bit Microcontroller
1 Introduction
The MC68HC16Z1 is a high-speed 16-bit control unit that is upwardly code compatible with M68HC11
controllers. It is a member of the M68300/68HC16 Family of modular microcontrollers.
M68HC16 controllers are built up from standard modules that interface through a common internal bus.
Standardization facilitates rapid development of devices tailored for specific applications.
The MC68HC16Z1 incorporates a true 16-bit central processing unit (CPU16), a system integration
module (SIM), an 8/10-bit analog-to-digital converter (ADC), a queued serial module (QSM), a general-
purpose timer (GPT), and a 2048-byte standby RAM (SRAM). These modules are interconnected by
the intermodule bus (IMB).
Maximum system clock for the MC68HC16Z1 is 16.78 MHz. A phase-locked loop circuit synthesizes
the clock from a frequency reference. Either a crystal (nominal frequency: 32.768 kHz) or an externally
generated signal can be used. System hardware and software support changes in clock rate during op-
eration. Because the MC68HC16Z1 is a fully static design, register and memory contents are not affect-
ed by clock rate changes.
High-density complementary metal-oxide semiconductor (HCMOS) architecture makes the basic power
consumption of the MC68HC16Z1 low. Power consumption can be minimized by stopping the system
clock. The M68HC16 instruction set includes a low-power stop (LPSTOP) command that efficiently im-
plements this capability.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
© MOTOROLA INC., 1992, 1996
M
Table 1 Ordering Information
Device
Package
132-PIN
PLASTIC
SURFACE
MOUNT
Temperature
Range (
°
C)
–40 to 85
Reference
Frequency
16.78 MHz
20 MHz
25 MHz
–40 to 105
16.78 MHz
20 MHz
25 MHz
–40 to 125
16.78 MHz
20 MHz
25 MHz
132-PIN
MOLDED
CARRIER
RING
–40 to 85
16.78 MHz
20 MHz
25 MHz
16.78 MHz
20 MHz
25 MHz
16.78 MHz
20 MHz
25 MHz
16.78 MHz
20 MHz
25 MHz
–40 to 105
16.78 MHz
20 MHz
25 MHz
–40 to 125
16.78 MHz
20 MHz
25 MHz
144-PIN
MOLDED
CARRIER
RING
–40 to 85
16.78 MHz
20 MHz
25 MHz
16.78 MHz
20 MHz
25 MHz
16.78 MHz
20 MHz
25 MHz
Shipping
Method
36 PER TRAY
2 PER TRAY
36 PER TRAY
2 PER TRAY
36 PER TRAY
2 PER TRAY
36 PER TRAY
2 PER TRAY
36 PER TRAY
2 PER TRAY
36 PER TRAY
2 PER TRAY
36 PER TRAY
2 PER TRAY
36 PER TRAY
2 PER TRAY
36 PER TRAY
2 PER TRAY
10 PER TUBE
10 PER TUBE
10 PER TUBE
10 PER TUBE
10 PER TUBE
10 PER TUBE
10 PER TUBE
10 PER TUBE
10 PER TUBE
44 PER TRAY
2 PER TRAY
44 PER TRAY
2 PER TRAY
44 PER TRAY
2 PER TRAY
44 PER TRAY
2 PER TRAY
44 PER TRAY
2 PER TRAY
44 PER TRAY
2 PER TRAY
44 PER TRAY
2 PER TRAY
44 PER TRAY
2 PER TRAY
44 PER TRAY
2 PER TRAY
13 PER TUBE
13 PER TUBE
13 PER TUBE
13 PER TUBE
13 PER TUBE
13 PER TUBE
13 PER TUBE
13 PER TUBE
13 PER TUBE
Order
Number
XC16Z1CFC16
SPAKXC16Z1CFC16
XC16Z1CFC20
SPAKXC16Z1CFC20
XC16Z1CFC25
SPAKXC16Z1CFC25
XC16Z1VFC16
SPAKXC16Z1VFC16
XC16Z1VFC20
SPAKXC16Z1VFC20
XC16Z1VFC25
SPAKXC16Z1VFC25
XC16Z1MFC16
SPAKXC16Z1MFC16
XC16Z1MFC20
SPAKXC16Z1MFC20
XC16Z1MFC25
SPAKXC16Z1MFC25
XC16Z1CFD16
XC16Z1CFD20
XC16Z1CFD25
XC16Z1VFD16
XC16Z1VFD20
XC16Z1VFD25
XC16Z1MFD16
XC16Z1MFD20
XC16Z1MFD25
XC16Z1CFV16
SPAKXC16Z1CFV16
XC16Z1CFV20
SPAKXC16Z1CFV20
XC16Z1CFV25
SPAKXC16Z1CFV25
XC16Z1VFV16
SPAKXC16Z1VFV16
XC16Z1VFV20
SPAKXC16Z1VFV20
XC16Z1VFV25
SPAKXC16Z1VFV25
XC16Z1MFV16
SPAKXC16Z1MFV16
XC16Z1MFV20
SPAKXC16Z1MFV20
XC16Z1MFV25
SPAKXC16Z1MFV25
XC16Z1CFM16
XC16Z1CFM20
XC16Z1CFM25
XC16Z1VFM16
XC16Z1VFM20
XC16Z1VFM25
XC16Z1MFM16
XC16Z1MFM20
XC16Z1MFM25
–40 to 105
–40 to 125
144-PIN
PLASTIC
SURFACE
MOUNT
–40 to 85
–40 to 105
–40 to 125
MOTOROLA
2
MC68HC16Z1
MC68HC16Z1TS/D
TABLE OF CONTENTS
Section
1
1.1
1.2
1.3
1.4
1.5
1.6
Page
Introduction
1
Features ...................................................................................................................................... 4
Pin Description ............................................................................................................................ 8
Signal Description ..................................................................................................................... 10
Internal Register Address Map ..................................................................................................13
Pseudolinear Memory Maps ......................................................................................................14
Intermodule Bus ........................................................................................................................ 15
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
4
4.1
4.2
4.3
4.4
5
5.1
5.2
5.3
6
6.1
6.2
6.3
7
7.1
7.2
7.3
8
9
16
Overview ................................................................................................................................... 16
M68HC11 Compatibility ............................................................................................................. 16
Programmer's Model ................................................................................................................. 17
Data Types ................................................................................................................................19
Addressing Modes ..................................................................................................................... 19
Instruction Set ........................................................................................................................... 20
Exceptions .................................................................................................................................39
System Integration Module
42
System Configuration and Protection ........................................................................................ 45
System Configuration ................................................................................................................ 45
System Protection .....................................................................................................................47
System Clock ............................................................................................................................49
External Bus Interface ............................................................................................................... 53
Resets ....................................................................................................................................... 64
Interrupts ................................................................................................................................... 67
Factory Test Block .....................................................................................................................69
Analog-to-Digital Converter Module
71
Analog Subsystem .................................................................................................................... 71
Digital Control Subsystem ......................................................................................................... 71
Bus Interface Subsystem .......................................................................................................... 71
ADC Registers ...........................................................................................................................73
Queued Serial Module
80
QSM Registers .......................................................................................................................... 81
QSPI Submodule .......................................................................................................................85
SCI Submodule .........................................................................................................................92
Standby RAM Module
99
SRAM Register Block ................................................................................................................ 99
SRAM Registers ........................................................................................................................99
SRAM Operation ..................................................................................................................... 100
General-Purpose Timer Module
102
Capture/Compare Unit ............................................................................................................ 103
Pulse-Width Modulator ............................................................................................................ 105
GPT Registers ......................................................................................................................... 106
Electrical Characteristics
114
Summary of Changes
140
CPU16
MC68HC16Z1
MC68HC16Z1TS/D
MOTOROLA
3
1.1 Features
• CPU16
— 16-Bit Architecture
— Full Set of 16-Bit Instructions
— Three 16-Bit Index Registers
— Two 16-Bit Accumulators
— Control-Oriented Digital Signal Processing Capability
— 1 Megabyte of Program Memory and 1 Megabyte of Data Memory
— High-Level Language Support
— Fast Interrupt Response Time
— Background Debugging Mode
— Fully Static Operation
• System Integration Module
— External Bus Support
— Programmable Chip-Select Outputs
— System Protection Logic
— Watchdog Timer, Clock Monitor, and Bus Monitor
— Two 8-Bit Dual Function Ports
— One 7-Bit Dual Function Port
— Phase-Locked Loop (PLL) Clock System
• 8/10-Bit Analog-to-Digital Converter
— Eight Channels, Eight Result Registers
— Eight Automated Modes
— Three Result Alignment Modes
— One 8-Bit Digital Input Port
• Queued Serial Module
— Enhanced Serial Communication Interface
— Queued Serial Peripheral Interface
— One 8-Bit Dual Function Port
• General-Purpose Timer
— Two 16-Bit Free-Running Counters with Prescaler
— Three Input Capture Channels
— Four Output Compare Channels
— One Input Capture/Output Compare Channel
— One Pulse Accumulator/Event Counter Input
— Two Pulse Width Modulation Outputs
— One 8-Bit Dual Function Port
— Two Optional Discrete Inputs
— Optional External Clock Input
• Standby RAM
— 1024-Byte Static RAM
— External Standby Voltage Supply Input
MOTOROLA
4
MC68HC16Z1
MC68HC16Z1TS/D
PAI
PGP7/IC4/OC5/OC1
PGP6/OC4/OC1
PGP5/OC3/OC1
PGP4/OC2/OC1
PGP3/OC1
PGP2/IC3
PGP1/IC2
PGP0/IC1
PWMA
PWMB
PCLK
PAI
IC4/OC5/OC1
OC4/OC1
OC3/OC1
OC2/OC1
OC1
IC3
IC2
IC1
PWMA
PWMB
PCLK
QSM
SIM
PORT GP
CONTROL
ADDR[23:0]
ADDR[23:19]
GPT
BR
BG
BGACK
FC2
FC1
FC0
CONTROL
PORT C
PQS7/TXD
PQS6/PCS3
PQS5/PCS2
PQS4/PCS1
PQS3/SS/PCS0
PQS2/SCK
PQS1/MOSI
PQS0/MISO
TXD
PCS3
PCS2
PCS1
PCS0
SCK
MOSI
MISO
CHIP
SELECTS
CS[10:0]
CSBOOT
BR/CS0
BG/CS1
BGACK/CS2
ADDR23/CS10
PC6/ADDR22/CS9
PC5/ADDR21/CS8
PC4/ADDR20/CS7
PC3/ADDR19/CS6
PC2/FC2/CS5
PC1/FC1/CS4
PC0/FC0/CS3
PORT QS
CONTROL
ADDR[18:0]
EBI
VDD
VSS
IMB
SIZ1
SIZ0
AS
DS
PE3
AVEC
DSACK1
DSACK0
CONTROL
PORT E
PE7/SIZ1
PE6/SIZ0
PE5/AS
PE4/DS
PE2/AVEC
PE1/DSACK1
PE0/DSACK0
PADA7/AN7
PADA6/AN6
PADA5/AN5
PADA4/AN4
PADA3/AN3
PADA2/AN2
PADA1/AN1
PADA0/AN0
VRH
VRL
VDDA
VSSA
DATA[15:0]
PORT AD
CONTROL
DATA[15:0]
ADC
SRAM
CPU16
IRQ[7:1]
CONTROL
PORT F
VSTBY
VSTBY
MODCLK
CLOCK
CONTROL
IPIPE1/DSI
IPIPE0/DSO
CONTROL
BKPT/DSCLK
R/W
RESET
HALT
BERR
PF7/IRQ7
PF6/IRQ6
PF5/IRQ5
PF4/IRQ4
PF3/IRQ3
PF2/IRQ2
PF1/IRQ1
PF0/MODCLK
CLKOUT
XTAL
EXTAL
XFC
VDDSYN
TSTME/TSC
FREEZE/QUOT
Z1 BLOCK
BKPT
IPIPE1
IPIPE0
DSI
DSO
DSCLK
FREEZE
TSC
TSTME
TEST
QUOT
Figure 1 MC68HC16Z1 Block Diagram
MC68HC16Z1
MC68HC16Z1TS/D
MOTOROLA
5
DSP and ARM Processors
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