3A, Radiation Hardened, Positive, Ultra Low Dropout
Regulator
ISL75051SEH
The ISL75051SEH is a radiation hardened low-voltage,
high-current, single-output LDO specified for up to 3.0A of
continuous output current. These devices operate over an input
voltage range of 2.2V to 6.0V and are capable of providing
output voltages of 0.8V to 5.0V adjustable based on resistor
divider setting. Dropout voltages as low as 65mV can be
realized using the device.
The OCP pin allows the short circuit output current limit
threshold to be programmed by means of a resistor from the
OCP pin to GND. The OCP setting range is from 0.5A minimum
to 8.5A maximum. The resistor sets the constant current
threshold for the output under fault conditions. The thermal
shutdown disables the output if the device temperature
exceeds the specified value. It subsequently enters an ON/OFF
cycle until the fault is removed. The ENABLE feature allows the
part to be placed into a low current shutdown mode that
typically draws about 1
µ
A. When enabled, the device operates
with a typical low ground current of 11mA, which provides for
operation with low quiescent power consumption.
The device is optimized for fast transient response and single
event effects. This reduces the magnitude of SET seen on the
output. Additional protection diodes and filters are not needed.
The device is stable with tantalum capacitors as low as 47µF
and provides excellent regulation all the way from no load to
full load. Programmable soft-start allows the user to program
the inrush current by means of the decoupling capacitor value
used on the BYP pin.
Features
•
DLA SMD#5962-11212
• Output current up to 3.0A at T
J
= +150°C
• Output accuracy ±1.5% over MIL temp range
• Ultra low dropout:
- 65mV (Typ) dropout at 1.0A
- 225mV (Typ) dropout at 3.0A
• Noise of 100µV
RMS
from 300Hz to 300kHz
• SET mitigation with no added filtering/diodes
• Input supply range: 2.2V to 6.0V
• Fast load transient response
• Shutdown current of 1µA (Typ)
• Output adjustable using external resistors
• PSRR 66dB (Typ) @ 1kHz
• Enable and PGood feature
• Programmable soft-start/in-rush current limiting
• Adjustable overcurrent limit from 0.5A to 8.5A
• Over-temperature shutdown
• Stable with 47µF min tantalum capacitor
• 18 Ld ceramic flatpack package
• Radiation environment
- High dose rate (50-300rad(Si)/s) . . . . . . . . . . 100krad(Si)
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . 100krad(Si)*
*Product capability established by initial characterization. The
"EH" version is acceptance tested on a wafer by wafer basis to
50 krad(Si) at low dose rate
Applications
• LDO regulator for space application
• DSP, FPGA and µP core power supplies
• Post-regulation of switched mode power supplies
• Down-hole drilling
EN
ROCP
VIN
VIN
PG
220µF
0.1µF
VIN
2.67k
EN
OCP
ISL75051SEH
VOUT
GND
R1
0.1µF
220µF
BYP
ADJ
0.30
+150°C
DROPOUT VOLTAGE (V)
0.1µF
VOUT
0.25
0.20
0.15
+25°C
0.10
0.05
0.00
0.00
+125°C
4.7n
PG
R2
100pF
0.50
1.00
1.50
2.00
2.50
3.00
3.50
I
OUT
(A)
FIGURE 1. TYPICAL APPLICATION
March 28, 2014
FN8294.3
FIGURE 2. DROPOUT vs I
OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
ISL75051SEH
Block Diagram
VIN
CURRENT
LIMIT ADJ
520MV
BYPASS
REFERENCE
BIAS
CURRENT
LIMIT
THERMAL
SHUTDOWN
POWER
PMOS
OCP
VOUT
ENABLE
LEVEL
SHIFT
ADJ
VADJ
PGOOD
DELAY
450mV
GND
Typical Applications
EN
EN
511
OCP
VIN
VIN
VIN
VIN
VIN
VIN
VIN
PG
220µF
0.1µF
4.32k
2.67k
17
18
2
1
VOUT
GND
0.1µF
220µF
11
12
13
8
7
6
ADJ
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
0.2µF
10
9
BYP
14
5
ISL75051SEH
15
16
4
3
4.7n
VIN
2.26k
5.49k
100pF
PG
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FN8294.3
March 28, 2014
ISL75051SEH
Pin Configuration
ISL75051SEH
(18 LD CDFP)
TOP VIEW
GND
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VADJ
BYP
1
2
3
4
5
6
7
8
9
GND
18
17
16
15
14
13
12
11
10
PG
VIN
VIN
VIN
VIN
VIN
VIN
OCP
EN
NOTE: The ESD triangular mark is indicative of pin #1. It is a part of the device
marking and is placed on the lid in the quadrant where pin #1 is located.
Pin Descriptions
PIN NUMBER
12, 13, 14
15, 16, 17
18
1
2, 3, 4
5, 6, 7
8
9
10
11
Top Lid
PIN NAME
V
IN
PG
GND
V
OUT
VADJ
BYP
EN
OCP
GND
Input supply pins.
V
OUT
in regulation signal. Logic low defines when V
OUT
is not in regulation. Must be grounded if not used.
GND pin.
Output voltage pins.
VADJ pin allows V
OUT
to be programmed with an external resistor divider.
To filter the internal reference, connect a 0.1µF capacitor from BYP pin to GND.
V
IN
independent chip enable. TTL and CMOS compatible.
Allows current limit to be programmed with an external resistor.
The top lid is connected to GND pin of the package.
DESCRIPTION
Ordering Information
ORDERING NUMBER
(Notes 1, 2)
5962R1121202VXC
5962R1121202V9A
5962R1121202VYC
ISL75051SEHFE/PROTO
ISL75051SRHX/SAMPLE
ISL75051SRHEVAL1Z
NOTES:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
2. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in this
“Ordering Information” table must be used when ordering.
PART NUMBER
ISL75051SEHVF
ISL75051SEHVX
ISL75051SEHVFE
ISL75051SEHFE/PROTO
ISL75051SRHX/SAMPLE
Evaluation Board
TEMP RANGE
(°C)
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
PACKAGE
(RoHS Compliant)
18 Ld CDFP
Die
18 Ld CDFP with Bottom Metal K18.E
18 Ld CDFP with Bottom Metal K18.E
Die
PKG
DWG. #
K18.D
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FN8294.3
March 28, 2014
ISL75051SEH
Absolute Maximum Ratings
V
IN
Relative to GND (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to + 6.7V
V
OUT
Relative to GND (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to + 6.7V
PG, EN, OCP/ADJ Relative to GND (Note 3). . . . . . . . . . . . -0.3 to + 6.7VDC
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
18 Ld CDFP Package (Notes 7, 8) . . . . . . .
28
4
18 Ld CDFP Package with Bottom
Metal and Solder Mount (Notes 7, 8). . .
24
3.3
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Recommended Operating Conditions
(Note 4)
Ambient Temperature Range (T
A
) . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Junction Temperature (T
J
) (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
V
IN
Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2V to 6.0V
V
OUT
Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.8V to 5.0V
PG, EN, OCP/ADJ Relative to GND . . . . . . . . . . . . . . . . . . . . . . . 0V to +6.0V
Radiation Information
Maximum Total Dose
Dose Rate = 50-300rad(Si)/s. . . . . . . . . . . . . . . . . . . . . . . . . 100krad (Si)
Dose Rate = 0.01rad(Si)/s (Note 5) . . . . . . . . . . . . . . . . . . . . 100krad (Si)
SEE Performance
SET (V
OUT
< ±5% During Events) (Note 6) . . . . . . . . . . .86MeV•cm
2
/mg
SEL/SEB (No Latchup/Burnout. . . . . . . . . . . . . . . . . . . .86MeV•cm
2
/mg
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3. Extended operation at these conditions may compromise reliability. Exceeding these limits will result in damage. Recommended operating conditions
define limits where specifications are guaranteed.
4. Refer to “Thermal Guidelines” on page 15.
5. Product capability established by initial characterization. The "EH" version is acceptance tested on a wafer by wafer basis to 50 krad(Si) at low dose
rate.
6. Specify EVAL test conditions for SET/SEB/SEL here.
7.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379
8. For
θ
JC
, the “case temp” location is the center of the package underside.
9. The device can work down to V
OUT
= 0.8V; however, the SET performance of < ±5% at LET = 86MeV.cm
2
/mg is guaranteed at V
OUT
= >1.5V only. SET
tests performed with 220µF 10V 25mΩ and 0.1µF CDR04 capacitor on the input and output.
Electrical Specifications
Unless otherwise noted, all parameters are guaranteed over the following specified conditions:
V
IN
= V
OUT
+ 0.4V, V
OUT
= 1.8V, C
IN
= C
OUT
= 220µF 25mΩ and 0.1µF X7R, T
J
= +25°C, I
L
= 0A. Applications must follow thermal guidelines of
the package to determine worst-case junction temperature (see Note 13). Boldface limits apply over the operating temperature range, -55°C to
+125°C. Pulse load techniques used by ATE to ensure T
J
= T
A
defines guaranteed limits.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 10)
TYP
MAX
(Note 10)
UNITS
DC CHARACTERISTICS
DC Output Voltage Accuracy
V
OUT
V
OUT
resistor adjust to 0.52V, 1.5V and 1.8V
2.2V < V
IN
< 3.6V; 0A < I
LOAD
< 3.0A
V
OUT
resistor adjust to 5.0V
V
OUT
+ 0.4V < V
IN
< 6.0V; 0A < I
LOAD
< 3.0A
VADJ Pin Voltage
BYP Pin
DC Input Line Regulation
DC Input Line Regulation
DC Input Line Regulation
DC Input Line Regulation
DC Input Line Regulation
DC Output Load Regulation
V
ADJ
V
BYP
2.2V < V
IN
< 6.0V; I
LOAD
= 0A
2.2V < V
IN
< 6.0V; I
LOAD
= 0A
2.2V < V
IN
< 3.6V, V
OUT
= 1.5V, +25°C and -55°C
(Note 11)
2.2V < V
IN
< 3.6V, V
OUT
= 1.5V, +125°C (Note 11)
2.2V < V
IN
< 3.6V, V
OUT
= 1.8V, +25°C and -55°C
(Note 11)
2.2V < V
IN
< 3.6V, V
OUT
= 1.8V, +125°C (Note 11)
V
OUT
+ 0.4V < V
IN
< 6.0V, V
OUT
= 5.0V (Note 11)
V
OUT
= 1.5V; 0A < I
LOAD
< 3.0A, V
IN
= V
OUT
+ 0.4V
(Note 11)
-4.0
-1.5
514.8
0.2
520
520
1.13
1.13
1.62
1.62
12.50
-0.8
3.5
8.0
3.5
10.5
20.0
-0.1
1.5
525.2
%
mV
mV
mV
mV
mV
mV
mV
mV
-1.5
0.2
1.5
%
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FN8294.3
March 28, 2014
ISL75051SEH
Electrical Specifications
Unless otherwise noted, all parameters are guaranteed over the following specified conditions:
V
IN
= V
OUT
+ 0.4V, V
OUT
= 1.8V, C
IN
= C
OUT
= 220µF 25mΩ and 0.1µF X7R, T
J
= +25°C, I
L
= 0A. Applications must follow thermal guidelines of
the package to determine worst-case junction temperature (see Note 13). Boldface limits apply over the operating temperature range, -55°C to
+125°C. Pulse load techniques used by ATE to ensure T
J
= T
A
defines guaranteed limits.
(Continued)
PARAMETER
DC Output Load Regulation
DC Output Load Regulation
VADJ Input Current
Ground Pin Current
Ground Pin Current
Ground Pin Current
Ground Pin Current
Ground Pin Current in Shutdown
Dropout Voltage
Dropout Voltage
Dropout Voltage
Output Short Circuit Current
Output Short Circuit Current
Output Short Circuit Current
Output Short Circuit Current
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
(Rising Threshold)
I
Q
I
Q
I
Q
I
Q
I
SHDN
V
DO
V
DO
V
DO
ISCL
ISCL
ISCH
ISCH
TSD
TSDn
SYMBOL
TEST CONDITIONS
V
OUT
= 1.8V; 0A < I
LOAD
< 3.0A, V
IN
= V
OUT
+ 0.4V
(Note 11)
V
OUT
= 5.0V; 0A < I
LOAD
< 3.0A, V
IN
= V
OUT
+ 0.4V
(Note 11)
V
ADJ
= 0.5V
V
OUT
= 1.5V; I
LOAD
= 0A, V
IN
= 2.2V
V
OUT
= 5.0V; I
LOAD
= 0A, V
IN
= 6.0V
V
OUT
= 1.5V; I
LOAD
= 3.0A, V
IN
= 2.2V
V
OUT
= 5.0V; I
LOAD
= 3.0A, V
IN
= 6.0V
ENABLE Pin = 0V, V
IN
= 6.0V
I
LOAD
= 1.0A, V
OUT
= 2.5V (Note 12)
I
LOAD
= 2.0A, V
OUT
= 2.5V (Note 12)
I
LOAD
= 3.0A, V
OUT
= 2.5V (Note 12)
V
OUT
= 0V, V
IN
= 2.2V, R
SET
= 5.11k
V
OUT
= 0V, V
IN
= 6.0V, R
SET
= 5.11k
V
OUT
= 0V, V
IN
= 2.2V, R
SET
= 511Ω
V
OUT
= 0V, V
IN
= 6.0V, R
SET
= 511Ω
V
OUT
+ 0.4V < V
IN
< 6.0V
V
OUT
+ 0.4V < V
IN
< 6.0V
11
16
11
16
1
65
140
225
1.1
1.2
5.7
6.2
175
25
MIN
(Note 10)
-4.0
-15.0
TYP
-1.2
-6.0
MAX
(Note 10)
-0.05
-0.05
1
12
18
13
18
10
100
200
300
UNITS
mV
mV
µA
mA
mA
mA
mA
µA
mV
mV
mV
A
A
A
A
°C
°C
AC CHARACTERISTICS
Input Supply Ripple Rejection
Input Supply Ripple Rejection
Phase Margin
Gain Margin
Output Noise Voltage
PSRR
PSRR
PM
GM
V
P-P
= 300mV, f = 1kHz, I
LOAD
= 3A; V
IN
= 2.5V,
V
OUT
= 1.8V
V
P-P
= 300mV, f = 100kHz, I
LOAD
= 3A; V
IN
= 2.5V,
V
OUT
= 1.8V
V
OUT
= 1.8V, C
L
= 220µF Tantalum
V
OUT
= 1.8V, C
L
= 220µF Tantalum
I
LOAD
= 10mA, BW = 300Hz < f < 300kHz, BYPASS
to GND capacitor = 0.2µF
42
66
30
70
16
100
dB
dB
dB
dB
µV
RMS
DEVICE START-UP CHARACTERISTICS: ENABLE PIN
Rising Threshold
Falling Threshold
Enable Pin Leakage Current
Enable Pin Propagation Delay
Hysteresis
2.2V < V
IN
< 6.0V
2.2V < V
IN
< 6.0V
V
IN
= 6.0V, EN = 6.0V
V
IN
= 2.2V, EN rise to I
OUT
rise
Must be independent of V
IN
; 2.2V < V
IN
< 6.0V
225
90
300
200
0.6
0.47
0.9
0.7
1.2
0.9
1
450
318
V
V
µA
µs
mV
DEVICE START-UP CHARACTERISTICS: PG PIN
PG Rising Threshold
PG Falling Threshold
PG Hysteresis
PG Low Voltage
2.2V < VIN < 6.0V
2.2V < VIN < 6.0V
2.2V < VIN < 6.0V
I
SINK
= 1mA
85
82
2.5
90
88
3.2
35
96
93
4.0
100
%
%
%V
OUT
mV
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