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Datasheet> All Categories > logic> logic> IDT74FCT16373ATPAG
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IDT74FCT16373ATPAG

Description
Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48
Categorylogic    logic   
File Size69KB，7 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
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IDT74FCT16373ATPAG Overview

Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48

IDT74FCT16373ATPAG Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
package instructionTSSOP, TSSOP48,.3,20
Reach Compliance Codecompli
seriesFCT
JESD-30 codeR-PDSO-G48
JESD-609 codee3
length12.5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.064 A
Humidity sensitivity level1
Number of digits8
Number of functions2
Number of ports2
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP48,.3,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply5 V
Prop。Delay @ Nom-Su5.2 ns
propagation delay (tpd)8.5 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width6.1 mm

IDT74FCT16373ATPAG Preview

IDT74FCT16373AT/CT
FAST CMOS 16-BIT TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 16-BIT
TRANSPARENT LATCH
IDT74FCT16373AT/CT
•
•
•
•
•
•
•
•
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical t
SK(o)
(Output Skew) < 250ps
Low input and output leakage
≤
1µA (max.)
V
CC
= 5V ±10%
High drive outputs (–32mA I
OH
, 64mA I
OL
)
Power off disable outputs permit “live insertion”
Typical V
OLP
(Output Ground Bounce) < 1.0V at V
CC
= 5V,
T
A
= 25°C
• Available in SSOP and TSSOP packages
DESCRIPTION:
The FCT16373T 16-bit transparent D-type latch is built using advanced dual
metal CMOS technology. These high-speed, low-power latches are ideal for
temporary storage of data. They can be used for implementing memory address
latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls
are organized to operate each device as two 8-bit latches, or one 16-bit latch.
Flow-through organization of signal pins simplifies layout. All inputs are designed
with hysteresis for improved noise margin.
The FCT16373T is ideally suited for driving high-capacitance loads and low-
impedance backplanes. The output buffers are designed with power off disable
capability to allow "live insertion" of boards when used as backplane drivers.
FUNCTIONAL BLOCK DIAGRAM
1
OE
2
OE
1
LE
1
D
1
2
LE
D
1
O
1
2
D
1
D
2
O
1
C
C
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
©2017
Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
JULY 2017
1
DSC-5454/7
IDT74FCT16373AT/CT
FAST CMOS 16-BIT TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1
OE
1
O
1
1
O
2
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to 7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
LE
1
D
1
1
D
2
V
TERM(2)
V
TERM(3)
T
STG
I
OUT
GND
1
O
3
1
O
4
GND
1
D
3
1
D
4
V
CC
1
O
5
1
O
6
V
CC
1
D
5
1
D
6
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Outputs and I/O terminals for FCT162XXX.
GND
1
O
7
1
O
8
2
O
1
2
O
2
GND
1
D
7
1
D
8
2
D
1
2
D
2
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
3.5
3.5
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
GND
2
O
3
2
O
4
GND
2
D
3
2
D
4
PIN DESCRIPTION
Pin Names
xDx
xLE
xOE
xOx
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
3-State Outputs
Description
V
CC
2
O
5
2
O
6
V
CC
2
D
5
2
D
6
GND
2
O
7
2
O
8
2
OE
GND
2
D
7
2
D
8
2
LE
FUNCTION TABLE
(1)
TOP VIEW
xDx
Inputs
xLE
H
H
X
xOE
L
L
H
H
L
X
NOTE:
1. H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High-impedance
Outputs
xOx
H
L
Z
Package Type
TSSOP
SSOP
Package Code
PAG56
PVG56
Order Code
PAG
PVG
2
IDT74FCT16373AT/CT
FAST CMOS 16-BIT TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OS
V
H
I
CCL
I
CCH
I
CCZ
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current (Input pins)
(5)
Input HIGH Current (I/O pins)
(5)
Input LOW Current (Input pins)
(5)
Input LOW Current (I/O pins)
(5)
High Impedance Output Current
(3-State Output pins)
(5)
Clamp Diode Voltage
Short Circuit Current
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max
V
IN
= GND or V
CC
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
=
GND
(3)
—
V
CC
= Max.
V
O
= 2.7V
V
O
= 0.5V
V
I
= GND
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
Min.
2
—
—
—
—
—
—
—
—
–80
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
–0.7
–140
100
5
Max.
—
0.8
±1
±1
±1
±1
±1
±1
–1.2
–250
—
500
V
mA
mV
µA
µA
Unit
V
V
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
I
O
V
OH
Parameter
Output Drive Current
Output HIGH Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
I
OFF
Output LOW Voltage
Input/Output Power Off Leakage
(5)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 0V, V
IN
= or V
O
≤
4.5V
—
—
±1
μA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. This test limit for this parameter is ±5µA at T
A
= –55°C.
Test Conditions
(1)
V
CC
= Max.
,
V
O
= 2.5V
(3)
I
OH
= –3mA
I
OH
= –15mA
I
OH
= –32mA
(4)
I
OL
= 64mA
Min.
–50
2.5
2.4
2
—
Typ.
(2)
—
3.5
3.5
3
0.2
Max.
180
—
—
—
0.55
Unit
mA
V
V
V
V
3
IDT74FCT16373AT/CT
FAST CMOS 16-BIT TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
ΔI
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
xOE = GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
xOE = GND
xLE = V
CC
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
xOE = GND
xLE = V
CC
Sixteen Bits Toggling
V
IN
= V
CC
V
IN
= GND
Min.
—
—
Typ.
(2)
0.5
60
Max.
1.5
100
Unit
mA
µA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
0.6
1.5
mA
—
0.9
2.3
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
2.4
4.5
(5)
16.5
(5)
—
6.4
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
ΔI
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
ΔI
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
4
IDT74FCT16373AT/CT
FAST CMOS 16-BIT TRANSPARENT LATCH
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
W
t
SK(o)
Parameter
Propagation Delay
xDx to xOx
Propagation Delay
xLE to xOx
Output Enable Time
Output Disable Time
Set-up Time HIGH or LOW, xDx to xLE
Hold Time HIGH or LOW, xDx to xLE
xLE Pulse Width HIGH
Output Skew
(3)
Condition
(2)
C
L
= 50pF
R
L
= 500Ω
Min.
(2)
FCT16373AT
Max.
1.5
5.2
2
1.5
1.5
2
1.5
5
—
8.5
6.5
5.5
—
—
—
0.5
Min.
(2)
FCT16373CT
Max.
1.5
3.6
2
1.5
1.5
2
1.5
5
—
3.7
4.4
3.9
—
—
—
0.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
5
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Description Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48 Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48 Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48 Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48 Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48 Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48 Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48 Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48
Is it Rohs certified? conform to conform to conform to conform to conform to conform to conform to conform to
Maker Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation
package instruction TSSOP, TSSOP48,.3,20 TSSOP, TSSOP, SSOP, SSOP48,.4 SSOP, TSSOP, TSSOP48,.3,20 SSOP, SSOP48,.4 SSOP,
Reach Compliance Code compli compliant compliant compli compli compli compli compli
series FCT FCT FCT FCT FCT FCT FCT FCT
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
JESD-609 code e3 e3 e3 e3 e3 e3 e3 e3
length 12.5 mm 12.5 mm 12.5 mm 15.875 mm 15.875 mm 12.5 mm 15.875 mm 15.875 mm
Logic integrated circuit type BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
Humidity sensitivity level 1 1 1 1 1 1 1 1
Number of digits 8 8 8 8 8 8 8 8
Number of functions 2 2 2 2 2 2 2 2
Number of ports 2 2 2 2 2 2 2 2
Number of terminals 48 48 48 48 48 48 48 48
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP TSSOP SSOP SSOP TSSOP SSOP SSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260 260 260
propagation delay (tpd) 8.5 ns 8.5 ns 3.7 ns 8.5 ns 8.5 ns 3.7 ns 3.7 ns 3.7 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.1 mm 1.1 mm 1.1 mm 2.794 mm 2.794 mm 1.1 mm 2.794 mm 2.794 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) - annealed Matte Tin (Sn) Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.5 mm 0.5 mm 0.5 mm 0.635 mm 0.635 mm 0.5 mm 0.635 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30 30 30 30 30
width 6.1 mm 6.1 mm 6.1 mm 7.493 mm 7.493 mm 6.1 mm 7.493 mm 7.493 mm
Load capacitance (CL) 50 pF - - 50 pF 50 pF 50 pF 50 pF 50 pF
Other features - - POWER OFF DISABLE O/PS; IOH MAX DURATION < 1S; MAX OUTPUT SKEW = 0.5NS POWER OFF DISABLE O/PS; IOH MAX DURATION < 1S; MAX OUTPUT SKEW = 0.5NS POWER OFF DISABLE O/PS; IOH MAX DURATION < 1S; MAX OUTPUT SKEW = 0.5NS POWER OFF DISABLE O/PS; IOH MAX DURATION < 1S; MAX OUTPUT SKEW = 0.5NS POWER OFF DISABLE O/PS; IOH MAX DURATION < 1S; MAX OUTPUT SKEW = 0.5NS POWER OFF DISABLE O/PS; IOH MAX DURATION < 1S; MAX OUTPUT SKEW = 0.5NS

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  8. Design of control system for double twisting machine
  9. Design of Computer Automatic Control System for Sluice Pump Station
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