K1S3216BCE
Preliminary
UtRAM
32Mb (2M x 16 bit) UtRAM
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND
IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS
OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN
SAMSUNG PRODUCTS OR TECHNOLOGY.
ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT GUAR-
ANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure could result in loss of life or personal or physical harm, or any military or defense
application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice.
-1-
Revision 0.2
April 2007
K1S3216BCE
Document Title
2Mx16 bit Page Mode Uni-Transistor Random Access Memory
Preliminary
UtRAM
Revision History
Revision No.
0.0
History
Initial
- Design Target
Revised
- Changed the ball out ’A6’ (from DNU to Vcc)
Revised
- Updated DC values
Draft Date
Dec. 14, 2006
Remark
Preliminary
0.1
Feb. 07, 2007
Preliminary
0.2
Apr. 10, 2007
Preliminary
-2-
Revision 0.2
April 2007
K1S3216BCE
Table of Contents
Preliminary
UtRAM
GENERAL DESCRIPTION...............................................................................................................................1
FEATURES ......................................................................................................................................................1
PRODUCT FAMILY..........................................................................................................................................1
POWER UP SEQUENCE.................................................................................................................................2
FUNCTIONAL DESCRIPTION .........................................................................................................................2
ABSOLUTE MAXIMUM RATINGS ...................................................................................................................3
RECOMMENDED DC OPERATING CONDITIONS.........................................................................................3
CAPACITANCE ................................................................................................................................................3
DC AND OPERATING CHARACTERISTICS...................................................................................................3
AC OPERATING CONDITIONS.......................................................................................................................4
AC CHARACTERISTICS..................................................................................................................................4
TIMING WAVEFORMS ....................................................................................................................................5
TIMING WAVEFORM OF READ CYCLE(1)...............................................................................................5
TIMING WAVEFORM OF READ CYCLE(2)...............................................................................................5
TIMING WAVEFORM OF PAGE CYCLE (READ ONLY) ........................................................................... 5
TIMING WAVEFORM OF WRITE CYCLE(1) ............................................................................................. 6
TIMING WAVEFORM OF WRITE CYCLE(2) ............................................................................................. 6
TIMING WAVEFORM OF WRITE CYCLE(3) ............................................................................................. 7
PACKAGE DIMENSION...................................................................................................................................8
48 BALL FINE PITCH BGA(0.75mm ball pitch).......................................................................................... 8
-1-
Revision 0.2
April 2007
K1S3216BCE
2M x 16 bit Page Mode Uni-Transistor Random Access Memory
GENERAL DESCRIPTION
Preliminary
UtRAM
The K1S3216BCE is fabricated by SAMSUNG′s advanced CMOS technology using one transistor memory cell. The device sup-
ports 4 page read operation and Industrial temperature range. The device also supports internal Temperature Compensated Self
Refresh mode for the standby power saving at room temperature range.
FEATURES
• Process technology: CMOS
• Organization: 2M x 16 bit
• Power supply voltage: 1.7V~1.95V
• 4-Page Read
• Three state outputs
• Supports power saving modes
- Internal TCSR (Temperature Compensated Self Refresh)
PRODUCT FAMILY
Product Family
Operating Temp.
Vcc Range
Speed
(t
RC
)
Power Dissipation
Standby
(I
SB
1, Max.)
120µA < 85°C
100µA < 40°C
Operating
(I
CC
2P, Max.)
35mA
PKG Type
K1S3216BCE-I
Industrial(-40~85°C)
1.7V~1.95V
70ns
48-FBGA-6.00 x7.00
PIN DESCRIPTIONS & FUNCTION BLOCK DIAGRAM
Clk gen.
1
2
3
4
5
6
Pre-charge circuit
V
CC
V
SS
V
CCQ
V
SSQ
A
LB
OE
A0
A1
A2
Vcc
Row
Addresses
Row
select
Memory
Array
B
I/O8
UB
A3
A4
CS
I/O0
C
I/O9
I/O10
A5
A6
I/O1
I/O2
Data
cont
Data
cont
Data
cont
Column Address
D
VssQ
I/O11
A17
A7
I/O3
Vcc
I/O
0
~I/O
7
I/O Circuit
Column Select
I/O
8
~I/O
15
E
VccQ
I/O12
DNU
A16
I/O4
Vss
F
I/O14
I/O13
A14
A15
I/O5
I/O6
G
I/O15
A19
A12
A13
WE
I/O7
H
A18
A8
A9
A10
A11
A20
CS
OE
WE
UB
LB
Control Logic
48-FBGA: Top View(Ball Down)
Name
CS
OE
WE
A0~A20
I/O0~I/O15
Function
Chip Select Inputs
Output Enable Input
Write Enable Input
Address Inputs
Data Inputs/Outputs
Name
V
CC
/V
CCQ
V
SS
/V
SSQ
UB
LB
Function
Power Supply(core / I/O)
Ground
Upper Byte(I/O8~15)
Lower Byte(I/O0~7)
-1-
Revision 0.2
April 2007
K1S3216BCE
POWER UP SEQUENCE
Preliminary
UtRAM
During the Power Up mode, the standby current can not be guaranteed. To get the stable standby current level, at least one cycle
of active operation should be implemented regardless of wait time duration. To get the appropriate device operation, be sure to
keep the following power up sequence.
1. Apply power.
2. Maintain stable power(Vcc min.=1.7V) for a minimum 150µs with CS=high.
TIMING WAVEFORM OF POWER UP
Min. 150µs
V
CC
V
CC(Min)
≈
≈
CS
FUNCTIONAL DESCRIPTION
CS
H
X
1)
X
1)
L
L
L
L
L
L
L
L
OE
X
1)
X
1)
X
1)
H
H
L
L
L
X
1)
X
1)
X
1)
WE
X
1)
X
1)
X
1)
H
H
H
H
H
L
L
L
LB
X
1)
X
1)
H
L
X
1)
L
H
L
L
H
L
UB
X
1)
X
1)
H
X
1)
L
H
L
L
H
L
L
I/O
1~8
High-Z
High-Z
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
I/O
9~16
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Dout
Dout
High-Z
Din
Din
Mode
Deselected
Deselected
Deselected
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
Power
Standby
Standby
Standby
Active
Active
Active
Active
Active
Active
Active
Active
1. X means "Don’t care". X should be low or high state.
-2-
Revision 0.2
April 2007