K4H510438J-LPCC0 datasheet, PDF

Datasheet> All Categories > storage> storage> K4H510438J-LPCC0

K4H510438J-LPCC0: DescriptionDDR DRAM, 128MX4, 0.65ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66; Categorystorage storage; File Size674KB，27 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

Download Datasheet Parametric View All

K4H510438J-LPCC0 Overview

DDR DRAM, 128MX4, 0.65ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66

K4H510438J-LPCC0 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	SAMSUNG
Parts packaging code	TSOP2
package instruction	TSOP2, TSSOP66,.46
Contacts	66
Reach Compliance Code	compli
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	0.65 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	200 MHz
I/O type	COMMON
interleaved burst length	2,4,8
JESD-30 code	R-PDSO-G66
length	22.22 mm
memory density	536870912 bi
Memory IC Type	DDR DRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	66
word count	134217728 words
character code	128000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	128MX4
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSSOP66,.46
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5 V
Certification status	Not Qualified
refresh cycle	8192
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	2,4,8
Maximum standby current	0.005 A
Maximum slew rate	0.19 mA
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10.16 mm

Preview

Download Datasheet

View All

Rev. 1.1, Feb. 2011

K4H510438J

K4H510838J

K4H511638J

512Mb J-die DDR SDRAM

60FBGA & 66TSOP-(II) with Lead-Free & Halogen-Free

(RoHS compliant)

datasheet

SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND

SPECIFICATIONS WITHOUT NOTICE.

Products and specifications discussed herein are for reference purposes only. All information discussed

herein is provided on an "AS IS" basis, without warranties of any kind.

This document and all information discussed herein remain the sole and exclusive property of Samsung

Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property

right is granted by one party to the other party under this document, by implication, estoppel or other-

wise.

Samsung products are not intended for use in life support, critical care, medical, safety equipment, or

similar applications where product failure could result in loss of life or personal or physical harm, or any

military or defense application, or any governmental procurement to which special terms or provisions

may apply.

For updates or additional information about Samsung products, contact your nearest Samsung office.

All brand names, trademarks and registered trademarks belong to their respective owners.

ⓒ

-1-

K4H510438J

K4H510838J

K4H511638J

datasheet

Rev. 1.1

DDR SDRAM

Table Of Contents

512Mb J-die DDR SDRAM

1. Key Features................................................................................................................................................................. 4

2. Ordering Information ..................................................................................................................................................... 4

3. Operating Frequencies ................................................................................................................................................. 4

4. Pin / Ball Description ..................................................................................................................................................... 5

4.1 Pin Description ........................................................................................................................................................ 5

4.2 Package Physical Dimension (TSOP II) .................................................................................................................. 6

4.3 Ball Description........................................................................................................................................................ 7

4.4 Package Physical Dimension (FBGA) ..................................................................................................................... 8

5. Block Diagram (32Mb x4 / 16Mb x8 / 8Mb x 16 I/O x4 Banks) ..................................................................................... 9

6. Input/Output Function Description ................................................................................................................................ 10

7. Command Truth Table .................................................................................................................................................. 11

8. General Description ...................................................................................................................................................... 12

9. Absolute Maximum Rating ............................................................................................................................................ 12

10. DC Operating Conditions ............................................................................................................................................ 12

11. DDR SDRAM Spec Items & Test Conditions .............................................................................................................. 13

12. Input/Output Capacitance ........................................................................................................................................... 13

13. Detailed test condition for DDR SDRAM IDD1 & IDD7A ............................................................................................ 14

14. DDR SDRAM IDD Spec Table .................................................................................................................................... 15

14.1 TSOP II.................................................................................................................................................................. 15

14.2 FBGA..................................................................................................................................................................... 16

15. AC Operating Conditions ............................................................................................................................................ 17

16. AC Overshoot/Undershoot specification for Address and Control Pins ...................................................................... 17

17. Overshoot/Undershoot specification for Data, Strobe and Mask Pins ........................................................................ 18

18. AC Timing Parameters & Specifications ..................................................................................................................... 19

19. System Characteristics for DDR SDRAM ................................................................................................................... 20

20. Component Notes ....................................................................................................................................................... 21

21. System Notes.............................................................................................................................................................. 23

22. IBIS : I/V Characteristics for Input and Output Buffers................................................................................................ 24

-3-

Recommended Resources

Special integrated amplifier for headphone amplifier LM4880-02

Use CD4011 and CD4017 to make a touch-type five-speed dimmer

Use 555 to form a DC step-down conversion circuit diagram

Indoor humidity control circuit

Isolated zero-crossing AC switch circuit

SONY G3F-K power supply-2

Wireless secure communication terminal based on FPGA system on chip: ...; 至芯科技FPGA大牛 FPGA/CPLD

u-boot LCD display issue: Recently, I debugged the LCD display under u-boot. Since the original LCD is a 320*240 TFT, I want to change it to 640*480. After modifying the parameters, I found that the display is stable, but it d...; yonggaoqcj Embedded System

SD Card Testing Tutorial: In the attachment, I wrote it myself, do you think it is useful?...; 651076842 51mcu

After cashing out 1.5 billion yuan, Mobike's post-80s founder left behind two unspoken rules for life: Author l Zhou ZuoluoSource l Zhou Zuoluo (ID: fangdushe520)On the evening of April 3, 2018, Mobike held a shareholders meeting regarding the acquisition by Meituan, and ultimately determined that Meit...; btty038 Talking

Three audio hardware interfaces: Three audio hardware interfaces: They are PCM (Pulse Code Modulation), IIS and AC97PCM pulse code modulation is the simplest audio interface and the easiest to implement. =The interface mainly include...; fish001 Analogue and Mixed Signal

RISC-V cross-compilation tool chain and the process of building a simulation environment: The process of building the RISCV simulator. If you have any questions, feel free to communicate.Building the RISC-V cross-compilation tool chain and building a simulation environment.School of Comput...; 木犯001号 FPGA/CPLD

Volvo and other companies develop rectennas to provide contactless charging for trucks and buses

At present, the development of wireless power supply technology for electric vehicles (EVs) is becoming more and more active. In 2012, Volvo of Sweden established Volvo Technology Japan in Tokyo as...[Details]
Design of CATV-based intelligent campus broadcasting/examination system

Traditional broadcasting systems generally need to be operated manually at a fixed time, and can only realize one-way broadcasting with few functions. Traditional bell ringing equipment has a singl...[Details]
Homemade healthy and energy-saving water dispenser

1. Circuit composition The whole circuit consists of two parts: 1. Power saving control circuit As shown in the figure below. Including delay circuit and drive circuit. (1) Delay ci...[Details]
Research on parking guidance system based on ultrasonic detection

1. Introduction With the growth of parking demand, the scale of parking lots is becoming larger and larger. A lot of research has been done on intelligent parking lots in China, but most of th...[Details]
EMI Compliance Testing in Automotive Applications

Automotive applications are particularly sensitive to EMI events, which are unavoidable in a noisy electrical environment consisting of a central battery, bundled wiring harnesses, various inductiv...[Details]
How Blackfin Convergent Processors Win with Scalability

Converged processors meet scalability requirements In current embedded system design, solutions based on MCU, DSP, FPGA and ASIC account for more than 90% of the market share. These solutions ...[Details]
Design of Solar Street Lights in Smart Residential Area

In order to highlight the concept of "energy saving and environmental protection" of intelligent buildings, solar street lights are designed for intelligent communities. The inclination and capacit...[Details]
Stability Analysis of Amplifier Loop Based on PSpice

Although it is relatively easy to check the stability of a simple amplifier at lower frequencies, it may be much more difficult to evaluate the stability of a more complex circuit. This artic...[Details]
AT89C52-based intelligent wireless security alarm

Introduction Nowadays, people pay more and more attention to the security alarm system, and people have higher and higher requirements for the functions and performance of the alarm. This paper prop...[Details]
Design of Digital Tachometer Based on Single Chip Microcomputer

Introduction In industrial control, speed measurement is often required. Generally, a contact tachometer is used. This tachometer must be placed against the center of the shaft to measure. It...[Details]
Beautiful and practical intelligent sound and light control corridor lights

Every time I go home and walk up the stairs, I am always scared. The corridor lights are often broken, and no one changes the bulbs, or they are not smart enough and need to be operated manually. E...[Details]
Battery capacity calculation method

The capacity of a battery depends on the amount of charge and discharge, in addition to some factors of the battery itself. Obviously, if the charge and discharge of the battery can be recorded all...[Details]
10 tips to extend the service life of UPS power supply

1. Tips for charging UPS for the first time After purchasing a new UPS, plug the UPS into the 220V mains power grid and charge it for at least 12 hours to ensure that the battery is fully char...[Details]
In-depth analysis of Ethernet power supply

Features POE technology can ensure the safety of existing structured cabling while ensuring the normal operation of the existing network and minimizing costs. The IEEE 802.3af standard is ...[Details]
Capacitors are indispensable in power supply design

Power supply is often the most easily overlooked link in the circuit design process. In fact, as an excellent design, power supply design should be very important, which greatly affects the perfor...[Details]

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components