Features
•
High-performance, Low-power 8/16-bit
Atmel
®
AVR
®
XMEGA
TM
Microcontroller
•
Non-Volatile Program and Data Memories
64K - 384K Bytes of In-System Self-Programmable Flash
4K - 8K Bytes Boot Section with Independent Lock Bits
2 KB - 4 KB EEPROM
4 KB - 32 KB Internal SRAM
External Bus Interface for up to 16M bytes SRAM
External Bus Interface for up to 128M bit SDRAM
Peripheral Features
– Four-channel DMA Controller with support for external requests
– Eight-channel Event System
– Eight 16-bit Timer/Counters
Four Timer/Counters with 4 Output Compare or Input Capture channels
Four Timer/Counters with 2 Output Compare or Input Capture channels
High-Resolution Extension on all Timer/Counters
Advanced Waveform Extension on two Timer/Counters
– Eight USARTs
IrDA modulation/demodulation for one USART
– Four Two-Wire Interfaces with dual address match (I
2
C and SMBus compatible)
– Four SPI (Serial Peripheral Interface) peripherals
– AES and DES Crypto Engine
– 16-bit Real Time Counter with separate Oscillator
– Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters
– Two Two-channel, 12-bit, 1 Msps Digital to Analog Converters
– Four Analog Comparators with Window compare function
– External Interrupts on all General Purpose I/O pins
– Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal and External Clock Options with PLL and Prescaler
– Programmable Multi-level Interrupt Controller
– Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby
– Advanced Programming, Test and Debugging Interfaces
JTAG (IEEE 1149.1 Compliant) Interface for programming, test and debugging
PDI (Program and Debug Interface) for programming and debugging
I/O and Packages
– 78 Programmable I/O Lines
– 100 - lead TQFP
– 100 - ball CBGA
– 100 - ball VFBGA
Operating Voltage
– 1.6 – 3.6V
Speed performance
– 0 – 12 MHz @ 1.6 – 3.6V
– 0 – 32 MHz @ 2.7 – 3.6V
–
–
–
–
•
8/16-bit
XMEGA A1
Microcontroller
ATxmega384A1
ATxmega256A1
ATxmega192A1
ATxmega128A1
ATxmega64A1
Preliminary
•
•
•
•
Typical Applications
•
•
•
•
•
Industrial control
Factory automation
Building control
Board control
White Goods
•
•
•
•
•
Climate control
ZigBee
Motor control
Networking
Optical
•
•
•
•
•
Hand-held battery applications
Power tools
HVAC
Metering
Medical Applications
8067L–AVR–08/10
XMEGA A1
‘
1. Ordering Information
Ordering Code
ATxmega384A1-AU
ATxmega256A1-AU
ATxmega192A1-AU
ATxmega128A1-AU
ATxmega64A1-AU
ATxmega384A1-CU
ATxmega256A1-CU
ATxmega192A1-CU
ATxmega128A1-CU
ATxmega64A1-CU
ATxmega128A1-C7U
ATxmega64A1-C7U
Notes:
1.
2.
3.
Flash (B)
384K + 8K
256K + 8K
192K + 8K
128K + 8K
64K + 4K
384K + 8K
256K + 8K
192K + 8K
128K + 8K
64K + 4K
128K + 8K
64K + 4K
E
2
4 KB
4 KB
2 KB
2 KB
2 KB
4 KB
4 KB
2 KB
2 KB
2 KB
2 KB
2 KB
SRAM
32 KB
16 KB
16 KB
8 KB
4 KB
32 KB
16 KB
16 KB
8 KB
4 KB
8 KB
4 KB
Speed (MHz)
32
32
32
32
32
32
32
32
32
32
32
32
Power Supply
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
1.6 - 3.6V
Package
(1)(2)(3)
Temp
100A
-40°C - 85°C
100C1
100C2
This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information.
Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green.
For packaging information, see
“Packaging information” on page 64.
Package Type
100A
100C1
100C2
100-lead, 14 x 14 x 1.0 mm, 0.5 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP)
100-ball, 9 x 9 x 1.2 mm Body, Ball Pitch 0.88 mm, Chip Ball Grid Array (CBGA)
100-ball, 7 x 7 x 1.0 mm Body, Ball Pitch 0.65 mm, Very Thin Fine-Pitch Ball Grid Array (VFBGA)
2
8067L–AVR–08/10
XMEGA A1
3. Overview
The Atmel
®
AVR
®
XMEGA
™
A1 is a family of low power, high performance and peripheral rich
CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing
powerful instructions in a single clock cycle, the XMEGA A1 achieves throughputs approaching
1 Million Instructions Per Second (MIPS) per MHz allowing the system designer to optimize
power consumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction, executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs many times faster than conven-
tional single-accumulator or CISC based microcontrollers.
The XMEGA A1 devices provides the following features: In-System Programmable Flash with
Read-While-Write capabilities, Internal EEPROM and SRAM, four-channel DMA Controller,
eight-channel Event System, Programmable Multi-level Interrupt Controller, 78 general purpose
I/O lines, 16-bit Real Time Counter (RTC), eight flexible 16-bit Timer/Counters with compare
modes and PWM, eight USARTs, four Two Wire Serial Interfaces (TWIs), four Serial Peripheral
Interfaces (SPIs), AES and DES crypto engine, two 8-channel, 12-bit ADCs with optional differ-
ential input with programmable gain, two 2-channel, 12-bit DACs, four analog comparators with
window mode, programmable Watchdog Timer with seperate Internal Oscillator, accurate inter-
nal oscillators with PLL and prescaler and programmable Brown-Out Detection.
The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging,
is available. The devices also have an IEEE std. 1149.1 compliant JTAG test interface, and this
can also be used for On-chip Debug and programming.
The XMEGA A1 devices have five software selectable power saving modes. The Idle mode
stops the CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and
all peripherals to continue functioning. The Power-down mode saves the SRAM and register
contents but stops the oscillators, disabling all other functions until the next TWI or pin-change
interrupt, or Reset. In Power-save mode, the asynchronous Real Time Counter continues to run,
allowing the application to maintain a timer base while the rest of the device is sleeping. In
Standby mode, the Crystal/Resonator Oscillator is kept running while the rest of the device is
sleeping. This allows very fast start-up from external crystal combined with low power consump-
tion. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue
to run. To further reduce power consumption, the peripheral clock to each individual peripheral
can optionally be stopped in Active mode and Idle sleep mode.
The device is manufactured using Atmel's high-density nonvolatile memory technology. The pro-
gram Flash memory can be reprogrammed in-system through the PDI or JTAG. A Bootloader
running in the device can use any interface to download the application program to the Flash
memory. The Bootloader software in the Boot Flash section will continue to run while the Appli-
cation Flash section is updated, providing true Read-While-Write operation. By combining an
8/16-bit RISC CPU with In-System Self-Programmable Flash, the Atmel XMEGA A1 is a power-
ful microcontroller family that provides a highly flexible and cost effective solution for many
embedded applications.
The XMEGA A1 devices are supported with a full suite of program and system development
tools including: C compilers, macro assemblers, program debugger/simulators, programmers,
and evaluation kits.
5
8067L–AVR–08/10