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Datasheet> All Categories > storage> storage> WED3DG6418V7D1I
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WED3DG6418V7D1I

Description
Synchronous DRAM Module, 16MX64, CMOS, SODIMM-144
Categorystorage    storage   
File Size387KB，5 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
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WED3DG6418V7D1I Overview

Synchronous DRAM Module, 16MX64, CMOS, SODIMM-144

WED3DG6418V7D1I Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instructionDIMM,
Reach Compliance Codeunknow
access modeFOUR BANK PAGE BURST
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-XDMA-N144
memory density1073741824 bi
Memory IC TypeSYNCHRONOUS DRAM MODULE
memory width64
Number of functions1
Number of ports1
Number of terminals144
word count16777216 words
character code16000000
Operating modeSYNCHRONOUS
organize16MX64
Package body materialUNSPECIFIED
encapsulated codeDIMM
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
self refreshYES
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountNO
technologyCMOS
Terminal formNO LEAD
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED

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White Electronic Designs
128MB- 16Mx64 SDRAM UNBUFFERED
FEATURES
n
n
n
n
n
n
n
n
n
PC100 and PC133 compatible
Burst Mode Operation
Auto and Self Refresh capability
LVTTL compatible inputs and outputs
Serial Presence Detect with EEPROM
Fully synchronous: All signals are registered on the positive
edge of the system clock
Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
3.3V
±
0.3V Power Supply
144 pin SO-DIMM JEDEC
WED3DG6418V-D1
ADVANCED*
DESCRIPTION
The WED3DG6418V is a 16Mx64 synchronous
DRAM module which consists of eight 16Mx8 SDRAM
components in TSOP II package, and one 2Kb EEPROM
in an 8 pin TSSOP package for Serial Presence Detect
which are mounted on a 144 pin SO-DIMM multilayer
FR4 Substrate.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
PINOUT
PIN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
FRONT
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
V
SS
DQM0
DQM1
V
CC
A0
A1
A2
V
SS
DQ8
DQ9
DQ10
DQ11
V
CC
DQ12
DQ13
PIN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
BACK
V
SS
DQ32
DQ33
DQ34
DQ35
V
CC
DQ36
DQ37
DQ38
DQ39
V
SS
DQM4
DQM5
V
CC
A3
A4
A5
V
SS
DQ40
DQ41
DQ42
DQ43
V
CC
DQ44
DQ45
PIN
51
53
55
57
59
FRONT
DQ14
DQ15
V
SS
NC
NC
PIN
52
54
56
58
60
BACK
DQ46
DQ47
V
SS
NC
NC
PIN
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
BACK
DQ21
DQ22
DQ23
V
CC
A6
A8
V
SS
A9
A10/AP
V
CC
DQM2
DQM3
V
SS
DQ24
DQ25
DQ26
DQ27
V
CC
DQ28
DQ29
DQ30
DQ31
V
SS
**SDA
V
CC
PIN
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
BACK
DQ53
DQ54
DQ55
V
CC
A7
BA0
V
SS
BA1
A11
V
CC
DQM6
DQM7
V
SS
DQ56
DQ57
DQ58
DQ59
V
CC
DQ60
DQ61
DQ62
DQ63
V
SS
**SCL
V
CC
PIN NAMES
A0 – A11
BA0-1
DQ0-63
CLK0, CK1
CKE0
CS0#
RAS#
CAS#
WE#
DQM0-7
V
CC
V
SS
SDA
SCL
DNU
NC
Address Input (Multiplexed)
Select Bank
Data Input/Output
Clock Input
Clock Enable Input
Chip Select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Serial Data I/O
Serial Clock
Do Not Use
No Connect
VOLTAGE KEY
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
CLK0
V
CC
RAS#
WE#
CS0#
NC
DNU
V
SS
NC
NC
V
CC
DQ16
DQ17
DQ18
DQ19
V
SS
DQ20
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
CKE0
V
CC
CAS#
NC
NC
NC
CK1
V
SS
NC
NC
V
CC
DQ48
DQ49
DQ50
DQ51
V
SS
DQ52
** These pins should be NC in the system which
does not support SPD.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June 2003
Rev. 3
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

WED3DG6418V7D1I Related Products

WED3DG6418V7D1I WED3DG6418V75D1 WED3DG6418V75D1I WED3DG6418V10D1I
Description Synchronous DRAM Module, 16MX64, CMOS, SODIMM-144 Synchronous DRAM Module, 16MX64, CMOS, SODIMM-144 Synchronous DRAM Module, 16MX64, CMOS, SODIMM-144 Synchronous DRAM Module, 16MX64, CMOS, SODIMM-144
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker White Electronic Designs Corporation White Electronic Designs Corporation White Electronic Designs Corporation White Electronic Designs Corporation
package instruction DIMM, DIMM, DIMM144,32 DIMM, DIMM,
Reach Compliance Code unknow unknown unknown unknow
access mode FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
JESD-30 code R-XDMA-N144 R-XDMA-N144 R-XDMA-N144 R-XDMA-N144
memory density 1073741824 bi 1073741824 bit 1073741824 bit 1073741824 bi
Memory IC Type SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE
memory width 64 64 64 64
Number of functions 1 1 1 1
Number of ports 1 1 1 1
Number of terminals 144 144 144 144
word count 16777216 words 16777216 words 16777216 words 16777216 words
character code 16000000 16000000 16000000 16000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
organize 16MX64 16MX64 16MX64 16MX64
Package body material UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code DIMM DIMM DIMM DIMM
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
self refresh YES YES YES YES
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V
surface mount NO NO NO NO
technology CMOS CMOS CMOS CMOS
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED

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