BTNGBR2 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > BTNGBR2

Preview

BTNGBR2: DescriptionCIT SWITCH; File Size343KB，5 Pages; ManufacturerCIT; Websitehttp://www.citswitch.com/

Download Datasheet View All

BTNGBR2 Overview

CIT SWITCH

Preview

Download Datasheet

View All

SPECIFICATIONS

Electrical Ratings

Electrical Life

Contact Resistance

Dielectric Strength

Actuation Force

Travel

Insulation Resistance

Operating Temperature

Storage Temperature

100mA @ 30VDC

10,000 cycles typical

< 50 mΩ max initial

500Vrms min

250+/- 100gF

Total Travel: 1.5mm

Travel to Lock: 1.0mm

> 100MΩ min

-40°C to 85°C

MATERIALS

←

RoHS COMPLIANT

Actuator

Frame

Cover

Base

Caps

Contacts

Terminals

6/6 Nylon

9T Nylon

PC and PBT

Phosphor Bronze, Silver Plated

Brass, Silver Plated

LED CHARACTERISTICS

LED Ratings

Reverse Voltage

Forward Current (avg)

Forward Current (peak)

Reverse Current V

= 5V

Power Dissipation

Operating & Storage Temperature

Forward Voltage (typ.), I

= 20mA

Forward Voltage (max.), I

= 20mA

Wavelength at Peak Emmission, I

= 20mA

Spectral Line Half-Width, I

= 20mA

Luminous Intensity, I

= 20mA

Viewing Angle

∆λ

120

2.1

2.6

660

120

125

2.1

2.6

585

120

COLORS

125

114

108

-40~ +85

2.0

3.3

3.1

2.5

3.8

3.6

572

460

515

120

700

120

125

114

3.3

3.8

N/A

800

120

Units

µA

°C

mcd

Deg

SCHEMATICS & PC LAYOUT

SINGLE COLOR LED

DUAL COLOR LED

www.citswitch.com

phone – 763.535.2339 fax – 763.535.2194

Recommended Resources

Sine wave signal generator circuit

Multifunctional timer rice cooker control circuit

Optical signal receiver circuit diagram

TDA1489 power amplifier circuit

555 time base flip-flop circuit

20-bit optical receiving circuit

[ESP32 Learning_1] The first ESP32-S3 example - hello_world: [i=s]This post was last edited by mars4zhu on 2022-7-16 20:00[/i]The first ESP32-S3 example - hello_worldCompile and runFollowing the step-by-step instructions in the document, execute the following c...; mars4zhu DigiKey Technology Zone

[Xiao Meige FPGA Advanced Tutorial] Chapter 11 Four-channel Amplitude-Frequency-Phase Adjustable DDS Signal Generator: [align=center][color=#000][size=15px][b][size=6]XI. Four-channel DDS signal generator with adjustable amplitude, frequency and phase[/size][/b][/size][/color][/align] [align=center][color=#000][size=1...; 芯航线跑堂 FPGA/CPLD

What to do after wince starts and initializes FLASH?: Please tell me, when wince starts, what operations are performed after initializing FLASH? How can I know whether FLASH initialization is successful? Thank you...; xfzhaoyong Embedded System

Xi'an Datang Telecom FPGA/CPLD Design Experience Sharing: Let's learn together and make progress together. . . . [[i] This post was last edited by Heshixifengbeihuashan on 2010-11-22 10:56 [/i]]...; 何事西风悲画扇 FPGA/CPLD

EMIF SDRAM Addressing: [size=5][color=#0000ff]EMIF_SDRAM I wrote a question about it before. Now I want to ask how the address of SDRAM is obtained. I know that SDRAM is divided into row address and column address. But I do...; YXQWXN DSP and ARM Processors

Hey guys, does anyone have a pin multiplexing table for the 100-pin K60?: I only have the 144 pin one....; 青稚 MCU

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components