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IDT70927S55PF

Description
Multi-Port SRAM, 32KX16, 55ns, CMOS, PQFP100, TQFP-100
Categorystorage    storage   
File Size44KB,2 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

IDT70927S55PF Overview

Multi-Port SRAM, 32KX16, 55ns, CMOS, PQFP100, TQFP-100

IDT70927S55PF Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instructionLFQFP,
Contacts100
Reach Compliance Code_compli
ECCN codeEAR99
Maximum access time55 ns
Other featuresAUTOMATIC POWER-DOWN
JESD-30 codeS-PQFP-G100
JESD-609 codee0
length14 mm
memory density524288 bi
Memory IC TypeMULTI-PORT SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of ports2
Number of terminals100
word count32768 words
character code32000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32KX16
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width14 mm
HIGH-SPEED 512K (32K x 16)
SYNCHRONOUS
DUAL-PORT RAM
Integrated Device Technology, Inc.
ADVANCED
IDT70927S/L
FEATURES:
• High-speed clock-to-data output times
— Military: 35/55ns (max.)
— Commercial: 25/35/55ns (max.)
• Low-power operation
— IDT70927S
Active: 900mW (typ.)
Standby: 5mW (typ.)
— IDT70927L
Active: 900mW (typ.)
Standby: 1mW (typ.)
• 32K X 16 bits Synchronous Operation
• Architecture based on Dual-Port RAM cells
— Allows full simultaneous access from both ports
• Synchronous operation
— Data input, address, and control registers
— Fast 25ns clock to data out
— Self-timed write allows fast write cycle
— 30ns cycle times, 33MHz operation
• On-Chip counter provides burst capability for any size
burst or direct address access controlled by
ADS
• This part is available in a Flow-Through mode, with a
Pipe-lined version available soon
• Upper and lower byte accessability
• Clock enable feature
• Chip Select Feature allows power savings by allowing
control of the memory array's power usage
• Two Chip Select pins allows for either high or low activa-
tion of the memory array
• Guaranteed data output hold times
• Available in 108-pin PGA and 100-pin TQFP
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT70927 is a high-speed 32K x 16 bit synchronous
Dual-Port RAM. The memory array is based on Dual-Port
memory cells to allow simultaneous access from both ports.
Registers on control, data, and address inputs provide low
setup and hold times. The timing latitude provided by this
approach allow systems to be designed with very short
realized cycle times. With an input data register, this device
has been optimized for applications having unidirectional data
flow or bidirectional data flow in bursts.
FUNCTIONAL BLOCK DIAGRAM
R/
L
L
R/
R
R
0L
CS
1L
L
L
0R
CS
1R
R
R
I/O
8L
-I/O
15L
I/O
Control
I/O
0L
-I/O
7L
I/O
Control
I/O
8R
-I/O
15R
I/O
0R
-I/O
7R
A
14L
A
0L
CLK
L
L
L
L
A
14R
Counter/
Address
Reg.
MEMORY
ARRAY
Counter/
Address
Reg.
A
0R
CLK
R
R
R
R
3201 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGE
©1995 Integrated Device Technology, Inc.
AUGUST 1995
DSC-1300/-
1

IDT70927S55PF Related Products

IDT70927S55PF IDT70927L55GB IDT70927L55PF IDT70927L35GB IDT70927S55GB IDT70927L35PF IDT70927S35GB IDT70927S35PF
Description Multi-Port SRAM, 32KX16, 55ns, CMOS, PQFP100, TQFP-100 Multi-Port SRAM, 32KX16, 55ns, CMOS, CPGA108, CAVITY UP, PGA-108 Multi-Port SRAM, 32KX16, 55ns, CMOS, PQFP100, TQFP-100 Multi-Port SRAM, 32KX16, 35ns, CMOS, CPGA108, CAVITY UP, PGA-108 Multi-Port SRAM, 32KX16, 55ns, CMOS, CPGA108, CAVITY UP, PGA-108 Multi-Port SRAM, 32KX16, 35ns, CMOS, PQFP100, TQFP-100 Multi-Port SRAM, 32KX16, 35ns, CMOS, CPGA108, CAVITY UP, PGA-108 Multi-Port SRAM, 32KX16, 35ns, CMOS, PQFP100, TQFP-100
Is it lead-free? Contains lead Lead free Contains lead Lead free Contains lead Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code QFP PGA QFP PGA PGA QFP PGA QFP
package instruction LFQFP, PGA, LFQFP, PGA, PGA, TQFP-100 PGA, TQFP-100
Contacts 100 108 100 108 108 100 108 100
Reach Compliance Code _compli _compli _compli not_compliant not_compliant not_compliant _compli _compli
ECCN code EAR99 3A001.A.2.C EAR99 3A001.A.2.C 3A001.A.2.C EAR99 3A001.A.2.C EAR99
Maximum access time 55 ns 55 ns 55 ns 35 ns 55 ns 35 ns 35 ns 35 ns
Other features AUTOMATIC POWER-DOWN SELF-TIMED WRITE AUTOMATIC POWER-DOWN SELF-TIMED WRITE SELF-TIMED WRITE AUTOMATIC POWER-DOWN SELF-TIMED WRITE AUTOMATIC POWER-DOWN
JESD-30 code S-PQFP-G100 S-CPGA-P108 S-PQFP-G100 S-CPGA-P108 S-CPGA-P108 S-PQFP-G100 S-CPGA-P108 S-PQFP-G100
length 14 mm 30.48 mm 14 mm 30.48 mm 30.48 mm 14 mm 30.48 mm 14 mm
memory density 524288 bi 524288 bi 524288 bi 524288 bit 524288 bit 524288 bit 524288 bi 524288 bi
Memory IC Type MULTI-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM
memory width 16 16 16 16 16 16 16 16
Number of functions 1 1 1 1 1 1 1 1
Number of ports 2 2 2 2 2 2 2 2
Number of terminals 100 108 100 108 108 100 108 100
word count 32768 words 32768 words 32768 words 32768 words 32768 words 32768 words 32768 words 32768 words
character code 32000 32000 32000 32000 32000 32000 32000 32000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 125 °C 70 °C 125 °C 125 °C 70 °C 125 °C 70 °C
organize 32KX16 32KX16 32KX16 32KX16 32KX16 32KX16 32KX16 32KX16
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Exportable YES YES YES YES YES YES YES YES
Package body material PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY
encapsulated code LFQFP PGA LFQFP PGA PGA LFQFP PGA LFQFP
Package shape SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
Package form FLATPACK, LOW PROFILE, FINE PITCH GRID ARRAY FLATPACK, LOW PROFILE, FINE PITCH GRID ARRAY GRID ARRAY FLATPACK, LOW PROFILE, FINE PITCH GRID ARRAY FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 240 NOT SPECIFIED 240 NOT SPECIFIED 225 225 225 225
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.6 mm 5.207 mm 1.6 mm 5.207 mm 5.207 mm 1.6 mm 5.207 mm 1.6 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES NO YES NO NO YES NO YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL MILITARY COMMERCIAL MILITARY MILITARY COMMERCIAL MILITARY COMMERCIAL
Terminal form GULL WING PIN/PEG GULL WING PIN/PEG PIN/PEG GULL WING PIN/PEG GULL WING
Terminal pitch 0.5 mm 2.54 mm 0.5 mm 2.54 mm 2.54 mm 0.5 mm 2.54 mm 0.5 mm
Terminal location QUAD PERPENDICULAR QUAD PERPENDICULAR PERPENDICULAR QUAD PERPENDICULAR QUAD
Maximum time at peak reflow temperature 20 NOT SPECIFIED 20 NOT SPECIFIED 30 NOT SPECIFIED 30 NOT SPECIFIED
width 14 mm 30.48 mm 14 mm 30.48 mm 30.48 mm 14 mm 30.48 mm 14 mm
Maker IDT (Integrated Device Technology) - - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
JESD-609 code e0 e3 e0 e3 e0 - e0 -
Terminal surface Tin/Lead (Sn/Pb) Matte Tin (Sn) Tin/Lead (Sn/Pb) Matte Tin (Sn) Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) -

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