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CH5001A

Description
CMOS COLOR DIGITAL VIDEO CAMERA
File Size132KB,34 Pages
ManufacturerETC1
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CH5001A Overview

CMOS COLOR DIGITAL VIDEO CAMERA

CH5001A
CHRONTEL
CMOS Color Digital Video Camera
Features
• 352 x 288 active pixel array with color filters, 1/3 inch
lens format
¥
• Programmable formats CIF 352x288, QCIF 176x144,
CCIR601 704x288
• Digital output CCIR601 4:2:2 (8-bit or 16-bit)
• Multidimensional automatic shutter control
• Below 5 LUX sensitivity
• Programmable I
2
C Serial bus control:
- Frame rate: 30fps-1fps in eight steps
- Gamma correction
- Shutter speed
- Analog gain
- 16 backlight compensation zones
- Black clamp level
- White balance adjustment
- Power down modes
Description
The CH5001 is a single chip active pixel CMOS color
video camera with digital video output in several formats.
Using sophisticated noise correction circuitry to minimize
fixed pattern noise and dark current effects, the CH5001
provides a supurb quality picture in a low cost device.
The CH5001 uses a proprietary autoshutter algorithm to
dynamically control the shutter time, analog gain, and
black clamp level, providing optimum picture and contrast
under all lighting conditions. The CH5001 also
incorporates extensive on-chip programmable digital
signal processing to maximize the usefulness of the device
in processor driven applications. This includes 16
programmable zones for backlight compensation,
allowing the user to adjust the image to their unique
lighting environment.
Additionally, at power-up the backlight compensation
zone, power-up condition, and direct A/D output modes
are selectable without IIC control by using the PUD pins.
Requiring a minimum of parts for operation, the CH5001
provides a low cost camera for the next generation video
conferencing, videophone, and surveillance products.
3
• Stand-alone 25fps PAL operation with all automatic
features
• Single crystal operation: Video timing on-chip
• Single 5V power supply
• Less than 0.5 watt power dissipation
¥
Patent number x,xxx,xxx patents pending
Photocell
Array
R
O
W
T
I
M
I
N
G
352
Columns
Shutter
Control
I
2
C
BUS
SD
SC
AS
B
G
G
R
288
Rows
Color
Control
Row Decode
Timing
&
Mode
Control
HREF
PDP*
HS*
VS*
CLKOUT
Reset*
XI/Fin
XO
MONO
TOUT/TOUTB
OVR
A/D
Gain
Black
Clamp
Matrix
Multiply
Gamma
Correct
RGB
to
YCrCB
Filter
Output
Format
Y[7:0]
C[7:0] PUD[6:0]
CRS
Figure 1: Block Diagram
201-0000-032 Rev 3.0, 6/2/99
1

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