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TC554161AFTI-85L

Description
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
Categorystorage    storage   
File Size139KB,10 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
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TC554161AFTI-85L Overview

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC554161AFTI-85L Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerToshiba Semiconductor
Parts packaging codeTSOP2
package instruction0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-54
Contacts54
Reach Compliance Codeunknow
Maximum access time85 ns
JESD-30 codeR-PDSO-G54
JESD-609 codee0
length22.22 mm
memory density4194304 bi
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals54
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256KX16
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
TC554161AFTI-70,-85,-10,-70L,-85L,-10L
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 16-BIT STATIC RAM
DESCRIPTION
The TC554161AFTI is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by
16bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V
±
10% power supply. Advanced circuit technology provides both high speed and low power at an operating current of
10 mA/MHz (typ) and a minimum cycle time of 70 ns. It is automatically placed in low-power mode at 2
mA
standby
current (typ) when chip enable (
CE
) is asserted high. There are two control inputs.
CE
is used to select the device
and for data retention control, and output enable (
OE
) provides fast memory access. Data byte control pin (
LB
,
UB
) provides lower and upper byte access. This device is well suited to various microprocessor system applications
where high speed, low power and battery backup are required. And, with a guaranteed operating extreme
temperature range of
-40°
to 85°C, the TC554161AFTI can be used in environments exhibiting extreme
temperature conditions. The TC554161AFTI is available in a plastic 54-pin thin -small-outline package (TSOP).
FEATURES
·
·
·
·
·
·
·
Low-power dissipation
Operating: 55 mW/MHz (typical)
Single power supply voltage of 5 V
±
10%
Power down features using
CE
.
Data retention supply voltage of 2 to 5.5 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of
-40°
to 85°C
Standby Current (maximum):
TC554161AFTI
-70,-85,-10
5.5 V
3.0 V
200
mA
100
mA
-70L,-85L,-10L
100
mA
50
mA
·
Access Times (maximum):
TC554161AFTI
-70,-70L
Access Time
CE
Access Time
OE
Access Time
-85,-85L
85 ns
85 ns
45 ns
-10,-10L
100 ns
100 ns
50 ns
70 ns
70 ns
35 ns
·
Package:
TSOP II54-P-400-0.80 (AFTI) (Weight: 0.57 g typ)
PIN ASSIGNMENT
(TOP VIEW)
NC
A3
A2
A1
A0
I/O16
I/O15
V
DD
GND
I/O14
I/O13
UB
CE
OP
R/W
I/O12
I/O11
GND
V
DD
I/O10
I/O9
NC
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
A4
A5
A6
A7
NC
I/O1
I/O2
V
DD
GND
I/O3
I/O4
LB
OE
OP
NC
I/O5
I/O6
GND
V
DD
I/O7
I/O8
A8
A9
A10
A11
A12
NC
PIN NAMES
A0~A17
I/O1~I/O16
CE
Address Inputs
Data Inputs/Outputs
Chip Enable
Read/Write Control
Output Enable
Data Byte Control
Power (+5 V)
Ground
No Connection
Option
R/W
OE
LB
,
UB
V
DD
GND
NC
OP*
*:
OP pin must be open of connected to GND.
(Normal pinout)
2001-08-17
1/10

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Description TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code TSOP2 TSOP2 TSOP2 TSOP2 TSOP2 TSOP2
package instruction 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-54 TSOP2, TSOP54,.46,32 TSOP2, TSOP54,.46,32 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-54 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-54 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-54
Contacts 54 54 54 54 54 54
Reach Compliance Code unknow unknow unknow unknow unknow unknow
Maximum access time 85 ns 70 ns 100 ns 70 ns 85 ns 100 ns
JESD-30 code R-PDSO-G54 R-PDSO-G54 R-PDSO-G54 R-PDSO-G54 R-PDSO-G54 R-PDSO-G54
length 22.22 mm 22.22 mm 22.22 mm 22.22 mm 22.22 mm 22.22 mm
memory density 4194304 bi 4194304 bi 4194304 bi 4194304 bi 4194304 bi 4194304 bi
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 16 16 16 16 16 16
Number of functions 1 1 1 1 1 1
Number of terminals 54 54 54 54 54 54
word count 262144 words 262144 words 262144 words 262144 words 262144 words 262144 words
character code 256000 256000 256000 256000 256000 256000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
organize 256KX16 256KX16 256KX16 256KX16 256KX16 256KX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP2 TSOP2 TSOP2 TSOP2 TSOP2 TSOP2
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
width 10.16 mm 10.16 mm 10.16 mm 10.16 mm 10.16 mm 10.16 mm
Maker Toshiba Semiconductor Toshiba Semiconductor Toshiba Semiconductor Toshiba Semiconductor Toshiba Semiconductor -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED
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