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FSPL130F4

Description
Power Field-Effect Transistor, 12A I(D), 100V, 0.075ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3
CategoryDiscrete semiconductor    The transistor   
File Size87KB，7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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FSPL130F4 Overview

Power Field-Effect Transistor, 12A I(D), 100V, 0.075ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3

FSPL130F4 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeBCY
package instructionCYLINDRICAL, O-MBCY-W3
Contacts4
Reach Compliance Codecompli
ECCN codeEAR99
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage100 V
Maximum drain current (Abs) (ID)12 A
Maximum drain current (ID)12 A
Maximum drain-source on-resistance0.075 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-205AF
JESD-30 codeO-MBCY-W3
JESD-609 codee0
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialMETAL
Package shapeROUND
Package formCYLINDRICAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)10 W
Maximum pulsed drain current (IDM)48 A
Certification statusNot Qualified
surface mountNO
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formWIRE
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON

FSPL130F4 Preview

FSPL130R, FSPL130F
Data Sheet
December 2001
Radiation Hardened, SEGR Resistant
N-Channel Power MOSFETs
Fairchild Star*Power Rad Hard
MOSFETs have been specifically
TM
developed for high performance
applications in a commercial or
military space environment. Star*Power MOSFETs offer the
system designer both extremely low r
DS(ON)
and Gate
Charge allowing the development of low loss Power
Subsystems. Star*Power FETs combine this electrical
capability with total dose radiation hardness up to 300 krads
while maintaining the guaranteed performance for Single
Event Effects (SEE) which the Fairchild FS families have
always featured.
The Fairchild portfolio of Star*Power FETs includes a family
of devices in various voltage, current and package styles.
The Star*Power family consists of Star*Power and
Star*Power Gold products. Star*Power FETs are optimized
for total dose and r
DS(ON)
performance while exhibiting SEE
capability at full rated voltage up to an LET of 37. Star*Power
Gold FETs have been optimized for SEE and Gate Charge
providing SEE performance to 80% of the rated voltage for
an LET of 82 with extremely low gate charge characteristics.
This MOSFET is an enhancement-mode silicon-gate power
field effect transistor of the vertical DMOS (VDMOS)
structure. It is specifically designed and processed to be
radiation tolerant. The MOSFET is well suited for
applications exposed to radiation environments such as
switching regulation, switching converters, power
distribution, motor drives and relay drivers as well as other
power control and conditioning applications. As with
conventional MOSFETs these Radiation Hardened
MOSFETs offer ease of voltage control, fast switching
speeds and ability to parallel switching devices.
Reliability screening is available as either TXV or Space
equivalent of MIL-PRF-19500.
Formerly available as type TA45212W.
Features
• 12A (Current Limited by Package), 100V, r
DS(ON)
= 0.075Ω
• UIS Rated
• Total Dose
- Meets Pre-Rad Specifications to 100 krad (Si)
- Rated to 300 krad (Si)
• Single Event
- Safe Operating Area Curve for Single Event Effects
- SEE Immunity for LET of 36MeV/mg/cm
2
with
V
DS
up to 100% of Rated Breakdown and
V
GS
of 5V Off-Bias
• Dose Rate
- Typically Survives 3E9 rad (Si)/s at 80% BV
DSS
- Typically Survives 2E12 if Current Limited to I
AS
• Photo Current
- 1.5nA Per-rad (Si)/s Typically
• Neutron
- Maintain Pre-Rad Specifications
for 3E13 Neutrons/cm
2
- Usable to 3E14 Neutrons/cm
2
Symbol
D
G
S
Packaging
TO-205AF
Ordering Information
RAD LEVEL
10K
100K
100K
300K
300K
SCREENING LEVEL
PART NUMBER/BRAND
D
G
S
Engineering Samples FSPL130D1
TXV
Space
TXV
Space
FSPL130R3
FSPL130R4
FSPL130F3
FSPL130F4
©2001 Fairchild Semiconductor Corporation
FSPL130R, FSPL130F Rev. B
FSPL130R, FSPL130F
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
FSPL130R, FSPL130F
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
Drain to Gate Voltage (R
GS
= 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current
T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Maximum Power Dissipation
T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulsed Avalanche Current, L = 100µH (See Test Figure) . . . . . . . . . . . . . . . . . . . . I
AS
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
S
Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
SM
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
(Distance >0.063in (1.6mm) from Case, 10s Max)
Weight (Typical)
25
10
0.20
48
12
48
-55 to 150
300
1.0 (Typical)
W
W
W/
o
C
A
A
A
o
C
o
C
UNITS
V
V
A
A
A
V
100
100
12 (Note)
9
48
±30
g
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: Current is limited by the package capability.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
TEST CONDITIONS
I
D
= 1mA, V
GS
= 0V
V
GS
= V
DS
,
I
D
= 1mA
T
C
= -55
o
C
T
C
= 25
o
C
T
C
= 125
o
C
T
C
= 25
o
C
T
C
= 125
o
C
T
C
= 25
o
C
T
C
= 125
o
C
T
C
= 25
o
C
T
C
= 125
o
C
MIN
100
-
2.0
1.0
-
-
-
-
-
-
-
-
-
-
-
V
GS
= 0V to 12V
V
DD
= 50V,
I
D
= 12A
-
-
-
V
GS
= 0V to 20V
V
GS
= 0V to 2V
I
D
= 12A, V
DS
= 15V
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
-
-
-
-
-
-
-
TYP
-
-
-
-
-
-
-
-
-
0.068
-
-
-
-
-
35
10
9
56
3
6
1570
380
20
-
MAX
-
5.5
4.5
-
25
250
100
200
0.912
0.075
0.118
20
50
35
30
40
13
12
-
-
-
-
-
-
5.0
UNITS
V
V
V
V
µA
µA
nA
nA
V
Ω
Ω
ns
ns
ns
ns
nC
nC
nC
nC
nC
V
pF
pF
pF
o
C/W
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
I
DSS
I
GSS
V
DS(ON)
r
DS(ON)12
t
d(ON)
t
r
t
d(OFF)
t
f
Q
g(12)
Q
gs
Q
gd
Q
g(20)
Q
g(TH)
V
(PLATEAU)
C
ISS
C
OSS
C
RSS
R
θ
JC
V
DS
= 80V,
V
GS
= 0V
V
GS
=
±30V
V
GS
= 12V, I
D
= 12A
I
D
= 9A,
V
GS
= 12V
Gate to Source Leakage Current
Drain to Source On-State Voltage
Drain to Source On Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate Charge Source
Gate Charge Drain
Gate Charge at 20V
Threshold Gate Charge
Plateau Voltage
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance Junction to Case
V
DD
= 50V, I
D
= 12A,
R
L
= 4.17Ω, V
GS
= 12V,
R
GS
= 7.5Ω
©2001 Fairchild Semiconductor Corporation
FSPL130R, FSPL130F Rev. B
FSPL130R, FSPL130F
Source to Drain Diode Specifications
PARAMETER
Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
SYMBOL
V
SD
t
rr
Q
RR
T
C
= 25
o
C, Unless Otherwise Specified
MIN
PARAMETER
Drain to Source Breakdown Volts
Gate to Source Threshold Volts
Gate to Body Leakage
Zero Gate Leakage
Drain to Source On-State Volts
Drain to Source On Resistance
NOTES:
1. Pulse test, 300µs Max.
2. Absolute value.
3. Insitu Gamma bias must be sampled for both V
GS
= 12V, V
DS
= 0V and V
GS
= 0V, V
DS
= 80% BV
DSS
.
(Note 3)
(Note 3)
(Notes 2, 3)
(Note 3)
(Notes 1, 3)
(Notes 1, 3)
SYMBOL
BV
DSS
V
GS(TH)
I
GSS
I
DSS
V
DS(ON)
r
DS(ON)12
TEST CONDITIONS
V
GS
= 0, I
D
= 1mA
V
GS
= V
DS
, I
D
= 1mA
V
GS
=
±30V,
V
DS
= 0V
V
GS
= 0, V
DS
= 80V
V
GS
= 12V, I
D
= 12A
V
GS
= 12V, I
D
= 9A
100
2.0
-
-
-
-
MAX
-
4.5
100
25
0.912
0.075
MIN
100
1.5
-
-
-
-
MAX
UNITS
-
4.5
100
50
0.972
0.080
V
V
nA
µA
V
Ω
100 krad
300 krad
I
SD
= 12A
I
SD
= 12A, dI
SD
/dt = 100A/µs
TEST CONDITIONS
MIN
-
-
-
TYP
-
-
0.68
MAX
1.5
160
-
UNITS
V
ns
µC
Electrical Specifications up to 300 krad
Single Event Effects (SEB, SEGR)
Note 4
ENVIRONMENT
(NOTE 5)
(NOTE 6)
TYPICAL LET
(MeV/mg/cm)
37
60
82
82
NOTES:
4. Testing conducted at Brookhaven National Labs or Texas A&M.
5. Fluence = 1E5 ions/cm
2
(typical), T = 25
o
C.
6. Ion Species: LET = 37, Br or Kr; LET = 60, I or Xe; LET = 82, Au.
7. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).
APPLIED
V
GS
BIAS
(V)
-5
-2
0
-2
(NOTE 7)
MAXIMUM
V
DS
BIAS
(V)
100
80
60
30
TEST
Single Event Effects Safe Operating Area
SYMBOL
SEESOA
TYPICAL RANGE (µ)
36
32
28
28
Performance Curves
Unless Otherwise Specified
120
100
LET = 37MeV/mg/cm
2
, RANGE = 36µ
LET = 60MeV/mg/cm
2
, RANGE = 32µ
LET = 82MeV/mg/cm
2
, RANGE = 28µ
FLUENCE = 1E5 IONS/cm
2
(TYPICAL)
120
LET = 37
100
80
V
DS
(V)
V
DS
(V)
80
60
40
60
40
LET = 82
20
LET = 60
20
TEMP = 25
o
C
0
0
-1
-2
-3
-4
V
GS
(V)
-5
-6
-7
0
0
4
8
12
16
20
24
NEGATIVE V
GS
BIAS (V)
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA
FIGURE 2. TYPICAL SEE SIGNATURE CURV E
©2001 Fairchild Semiconductor Corporation
FSPL130R, FSPL130F Rev. B
FSPL130R, FSPL130F
Performance Curves
1E-3
LIMITING INDUCTANCE (HENRY)
Unless Otherwise Specified
(Continued)
14
12
1E-4
ILM = 10A
30A
1E-5
100A
300A
1E-6
I
D
, DRAIN (A)
10
8
6
4
2
1E-7
10
30
100
DRAIN SUPPLY (V)
300
1000
0
-50
0
50
100
150
T
C
, CASE TEMPERATURE (
o
C)
FIGURE 3. TYPICAL DRAIN INDUCTANCE REQUIRED TO
LIMIT GAMMA DOT CURRENT TO I
AS
FIGURE 4. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE
200
100
I
D
, DRAIN CURRENT (A)
T
C
= 25
o
C
12V
10
100µs
1ms
Q
GS
1
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
10ms
V
G
Q
G
Q
GD
0.10
1
10
100
300
CHARGE
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 5. FORWARD BIAS SAFE OPERATING ARE A
FIGURE 6. BASIC GATE CHARGE WAVEFORM
2.5
I
D
, DRAIN TO SOURCE CURRENT (A)
PULSE DURATION = 250ms, V
GS
= 12V, I
D
= 9A
2.0
NORMALIZED r
DS(ON)
100
V
GS
= 14V
V
GS
= 12V
V
GS
= 10V
V
GS
= 8V
V
GS
= 6V
80
1.5
60
1.0
40
V
GS
= 6V
0.5
20
0.0
-80
-40
0
40
80
120
160
0
0
1
2
3
4
5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 7. TYPICAL NORMALIZED r
DS(ON)
vs JUNCTION
TEMPERATURE
FIGURE 8. TYPICAL OUTPUT CHARACTERISTICS
©2001 Fairchild Semiconductor Corporation
FSPL130R, FSPL130F Rev. B
FSPL130R, FSPL130F
Performance Curves
NORMALIZED THERMAL RESPONSE (Z
θJC
)
10
Unless Otherwise Specified
(Continued)
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θ
JC
+ T
C
0.001
10
-5
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (s)
10
0
P
DM
t
1
t
2
10
1
FIGURE 9. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE
100
I
AS
, AVALANCHE CURRENT (A)
STARTING T
J
= 25
o
C
10
STARTING T
J
= 150
o
C
IF R = 0
t
AV
= (L) (I
AS
) / (1.3 RATED BV
DSS
- V
DD
)
IF R
≠
0
t
AV
= (L/R) ln [(I
AS
*R) / (1.3 RATED BV
DSS
- V
DD
) + 1]
1
0.01
0.1
1
10
t
AV
, TIME IN AVALANCHE (ms)
FIGURE 10. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
ELECTRONIC SWITCH OPENS
WHEN I
AS
IS REACHED
V
DS
L
+
CURRENT I
TRANSFORMER
AS
BV
DSS
t
P
I
AS
50Ω
+
V
DD
V
DS
V
DD
-
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
V
GS
≤
20V
-
DUT
50V-150V
50Ω
t
AV
0V
t
P
FIGURE 11. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 12. UNCLAMPED ENERGY WAVEFORMS
©2001 Fairchild Semiconductor Corporation
FSPL130R, FSPL130F Rev. B
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FSPL130F4 Related Products

FSPL130F4 FSPL130F3 FSPL130D1
Description Power Field-Effect Transistor, 12A I(D), 100V, 0.075ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3 Power Field-Effect Transistor, 12A I(D), 100V, 0.075ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3 Power Field-Effect Transistor, 12A I(D), 100V, 0.075ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3
Maker Fairchild Fairchild Fairchild
Parts packaging code BCY BCY BCY
package instruction CYLINDRICAL, O-MBCY-W3 CYLINDRICAL, O-MBCY-W3 CYLINDRICAL, O-MBCY-W3
Contacts 4 4 4
Reach Compliance Code compli compliant unknown
ECCN code EAR99 EAR99 EAR99
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 100 V 100 V 100 V
Maximum drain current (ID) 12 A 12 A 12 A
Maximum drain-source on-resistance 0.075 Ω 0.075 Ω 0.075 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JEDEC-95 code TO-205AF TO-205AF TO-205AF
JESD-30 code O-MBCY-W3 O-MBCY-W3 O-MBCY-W3
Number of components 1 1 1
Number of terminals 3 3 3
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE
Package body material METAL METAL METAL
Package shape ROUND ROUND ROUND
Package form CYLINDRICAL CYLINDRICAL CYLINDRICAL
Polarity/channel type N-CHANNEL N-CHANNEL N-CHANNEL
Maximum pulsed drain current (IDM) 48 A 48 A 48 A
Certification status Not Qualified Not Qualified Not Qualified
surface mount NO NO NO
Terminal form WIRE WIRE WIRE
Terminal location BOTTOM BOTTOM BOTTOM
transistor applications SWITCHING SWITCHING SWITCHING
Transistor component materials SILICON SILICON SILICON
Is it Rohs certified? incompatible incompatible -
Maximum drain current (Abs) (ID) 12 A 12 A -
JESD-609 code e0 e0 -
Maximum operating temperature 150 °C 150 °C -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED -
Maximum power dissipation(Abs) 10 W 10 W -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -

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The upper computer and the underlying control module establish a TCP/IP connection and then communicate. Data is exchanged once every 5 seconds on average, and the amount of data is less than 100 byte...
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