HC05C5GRS/D
REV 1.2
68HC05C5
SPECIFICATION
(General Release)
©August
29, 1994
CSIC System Design Group
Austin, Texas
Motorola reserves the right to make changes without further notice to any products herein
to improve reliability, function or design. Motorola does not assume any liability arising out
of the application or use of any product or circuit described herein; neither does it convey
any license under its patent rights nor the rights of others. Motorola products are not
designed, intended, or authorized for use as components in systems intended for surgical
implant into the body, or other applications intended to support or sustain life, or for any
other application in which the failure of the Motorola product could create a situation
where personal injury or death may occur. Should Buyer purchase or use Motorola
products for any such unintended or unauthorized application, Buyer shall indemnify and
hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney
fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that Motorola was
negligent regarding the design or manufacture of the part.
MC68HC05C5 Specification Release 1.2
TABLE OF CONTENTS
SECTION 1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.4.9
1.4.10
INTRODUCTION .............................................................. 1
GENERAL...................................................................................1
FEATURES.................................................................................1
MASK OPTIONS ........................................................................2
SIGNAL DESCRIPTION .............................................................3
V
DD
AND V
SS
........................................................................3
PE..........................................................................................3
IRQ ........................................................................................3
OSC1 AND OSC2 .................................................................3
RESET ..................................................................................3
TCAP.....................................................................................3
PA0-PA7................................................................................3
PB0-PB7................................................................................4
PC0-PC7 ...............................................................................4
PD0-PD7 ...............................................................................4
SECTION 2
2.1
2.2
OPERATING MODES ...................................................... 5
SINGLE-CHIP MODE .................................................................5
SELF-CHECK MODE .................................................................6
SECTION 3
3.1
3.2
3.3
3.3.1
3.3.2
MEMORY ......................................................................... 9
ROM .........................................................................................11
RAM..........................................................................................11
EEPROM ..................................................................................11
PROGRAMMING REGISTER $1C .....................................11
PROGRAMMING/ERASING PROCEDURES .....................13
SECTION 4
4.1
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.3
4.3.1
4.3.2
CPU CORE..................................................................... 15
REGISTERS .............................................................................15
ACCUMULATOR (A) ...........................................................15
INDEX REGISTER (X) ........................................................16
PROGRAM COUNTER (PC)...............................................16
STACK POINTER (SP) .......................................................16
CONDITION CODE REGISTER (CCR) ..............................16
INSTRUCTION SET .................................................................17
REGISTER/MEMORY INSTRUCTIONS .............................17
READ-MODIFY-WRITE INSTRUCTIONS ..........................18
BRANCH INSTRUCTIONS .................................................19
BIT MANIPULATION INSTRUCTIONS ...............................20
CONTROL INSTRUCTIONS ...............................................20
ADDRESSING MODES............................................................21
IMMEDIATE ........................................................................21
DIRECT ...............................................................................21
MOTOROLA
Page iii
MC68HC05C5 Specification Release 1.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10
4.4
4.4.1
4.4.2
4.4.3
4.5
4.5.1
4.5.2
4.5.3
4.5.4
4.6
4.6.1
4.6.2
EXTENDED ........................................................................ 21
RELATIVE........................................................................... 21
INDEXED, NO OFFSET ..................................................... 22
INDEXED, 8-BIT OFFSET .................................................. 22
INDEXED, 16-BIT OFFSET ................................................ 22
BIT SET/CLEAR ................................................................. 22
BIT TEST AND BRANCH ................................................... 22
INHERENT.......................................................................... 23
RESETS ................................................................................... 23
POWER-ON RESET (POR)................................................ 23
RESET PIN ......................................................................... 24
COMPUTER OPERATING PROPERLY (COP) RESET..... 24
INTERRUPTS .......................................................................... 24
HARDWARE CONTROLLED INTERRUPT SEQUENCE... 25
SOFTWARE INTERRUPT (SWI) ........................................ 25
EXTERNAL INTERRUPT ................................................... 25
TIMER INTERRUPT ........................................................... 26
LOW-POWER MODES ............................................................ 28
STOP .................................................................................. 28
WAIT ................................................................................... 29
SECTION 5
5.1
5.2
5.3
5.4
5.5
INPUT/OUTPUT PORTS ................................................31
PORT A .................................................................................... 31
PORT B .................................................................................... 31
PORT C .................................................................................... 31
PORT D .................................................................................... 31
INPUT/OUTPUT PROGRAMMING .......................................... 32
SECTION 6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
TIMER.............................................................................33
INTRODUCTION ...................................................................... 33
COUNTER................................................................................ 34
OUTPUT COMPARE REGISTER ............................................ 34
INPUT CAPTURE REGISTER ................................................. 35
TIMER CONTROL REGISTER (TCR) $12............................... 35
TIMER STATUS REGISTER (TSR) $13 .................................. 37
TIMER DURING WAIT MODE ................................................. 38
TIMER DURING STOP MODE................................................. 38
SECTION 7
7.1
7.1.1
7.1.2
7.1.3
7.2
7.2.1
7.2.2
7.2.3
MOTOROLA
Page iv
SIMPLE SERIAL INPUT/OUTPUT PORT......................39
SIGNAL FORMAT .................................................................... 39
SCK..................................................................................... 39
SDO .................................................................................... 39
SDI ...................................................................................... 40
SIOP REGISTERS ................................................................... 40
SIOP CONTROL REGISTER (SCR)................................... 40
SIOP STATUS REGISTER (SSR) ...................................... 42
SIOP DATA REGISTER (SDR)........................................... 42
MC68HC05C5 Specification Release 1.2
SECTION 8
8.1
8.2
8.3
8.4
8.5
COMPUTER OPERATING PROPERLY........................ 43
INTRODUCTION ......................................................................43
RESETTING THE COP ............................................................43
COP TEST FEATURES............................................................43
COP DURING WAIT MODE .....................................................43
COP DURING STOP MODE ....................................................43
SECTION 9
9.1
9.2
9.3
9.4
9.5
ELECTRICAL SPECIFICATIONS.................................. 45
MAXIMUM RATINGS ...............................................................45
THERMAL CHARACTERISTICS..............................................45
DC ELECTRICAL CHARACTERISTICS ..................................46
CONTROL TIMING...................................................................47
SIOP TIMING............................................................................49
SECTION 10
10.1
10.2
MECHANICAL SPECIFICATIONS ............................... 51
40-PIN DUAL INLINE PACKAGE .............................................51
44-PIN PLCC PACKAGE..........................................................52
MOTOROLA
Page v
MC68HC05C5 Specification Rev. 1.2
LIST OF FIGURES
Figure 1-1:
Figure 2-1:
Figure 2-2:
Figure 3-1:
Figure 3-2:
Figure 3-3:
Figure 4-1:
Figure 4-2:
Figure 4-3:
Figure 4-4:
Figure 4-5:
Figure 4-6:
Figure 5-1:
Figure 6-1:
Figure 6-2:
Figure 6-3:
Figure 7-1:
Figure 7-2:
Figure 7-3:
Figure 7-4:
Figure 7-5:
Figure 7-6:
Figure 9-1:
Figure 9-2:
Figure 9-3:
Self-Check Mode Schematic for the MC68HC05C5 .................................2
Single-Chip Mode Pinout of the MC68HC05C5........................................6
Self-Check Mode Schematic for the MC68HC05C5 .................................7
The 8K Memory Map of the MC68HC05C5 ..............................................9
I/O Registers for the MC68HC05C5 .......................................................10
Programming Register ............................................................................11
Programming Model ...............................................................................15
Stacking Order ........................................................................................15
Power-On Reset and RESET .................................................................23
Interrupt Flowchart ..................................................................................27
Stop Recovery Timing Diagram ..............................................................28
STOP/WAIT Flowcharts..........................................................................29
Port I/O Circuitry .....................................................................................32
Timer Block Diagram ..............................................................................33
Timer Control Register............................................................................35
Timer Status Register .............................................................................37
SIOP Block Diagram ...............................................................................39
Serial I/O Port Timing (CPOL=1) ............................................................40
Serial I/O Port Timing (CPOL=0) ............................................................40
SIOP Control Register ............................................................................40
SIOP Status Register..............................................................................42
SIOP Data Register ................................................................................42
Stop Recovery Timing Diagram ..............................................................48
LVPI Timing Diagram..............................................................................48
SIOP Timing Diagram .............................................................................49
MOTOROLA
Page vii
Discrete Device
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