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DG191

Description
DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP16
Categoryaccessories   
File Size108KB,9 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet View All

DG191 Overview

DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP16

DG189/190/191
Vishay Siliconix
High-Speed Drivers with Dual SPDT JFET Switches
FEATURES
D
Constant On-Resistance Over
Entire Analog Range
D
Low Leakage
D
Low Crosstalk
D
Rad Hardness
BENEFITS
D
D
D
D
D
Low Distortion
Eliminates Large Signal Errors
High Precision
High Bandwidth Capability
Fault Protection
APPLICATIONS
D
D
D
D
D
Audio Switching
Video Switching
Sample/Hold
Guidance and Control Systems
Aerospace
DESCRIPTION
The DG189/190/191 are precision dual single-pole,
double-throw (SPDT) analog switches designed to provide
accurate switching of video and audio signals. This series is
ideally suited for applications requiring a constant
on-resistance over the entire analog range.
To achieve fast and accurate switch performance, each device
comprises four n-channel JFET transistors and a TTL
compatible bipolar driver. The driver is designed to achieve
break-before-make switching action, eliminating the
inadvertent shorting between channels and the crosstalk
which would result. In the on state, each switch conducts
current equally well in either direction. In the off condition, the
switches will block up to 20 V peak-to-peak, with feedthrough
of less than 60 dB at 10 MHz.
The major difference in the devices is the on-resistance
(DG189—10
W
, DG190—30
W
, DG191—75
W).
Reduced
errors are achieved through low leakage current (I
D(on)
< 2 nA). Applications which benefit from the flat JFET
on-resistance include audio switching, video switching, and
data acquisition.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Dual-In-Line
D
1
NC
D
3
S
3
S
4
D
4
NC
D
2
1
2
3
4
5
6
7
8
Top View
16
15
14
13
12
11
10
9
S
1
IN
1
V
V
R
V
L
V+
IN
2
S
2
S
4
D
4
D
2
S
2
IN
2
V+
V
L
Flat Package
1
2
3
4
5
6
7
Top View
Refer to JAN38510 Information, Military Section
*Common to Substrate and Case
14
13
12
11
10
9
8
S
3
D
3
D
1
S
1
IN
1
V *
V
R
TRUTH TABLE
Logic
0
1
SW
1
, SW
2
OFF
ON
Logic “0”
v
0 8 V
g
0.8
Logic “1”
w
2 4 V
2.4
SW
3
, SW
4
ON
OFF
Document Number: 70034
S-51140—Rev. D, 20-Jun-05
www.vishay.com
1

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